Processor Load Instruction for Code Conversion with Executable Permission Check

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Solution Overview

Problem

Existing techniques for converting code between processors with different instruction set architectures often fail to conform to memory access permissions models, leading to execution issues when code is not executable as stored in memory.

Innovation Solution

A new processor instruction, LOAD_AS_IF_FETCH, is introduced to load code for conversion prior to execution, ensuring that access permissions are checked for executability, allowing code conversion while adhering to memory access permissions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If code is loaded from memory for execution, then the code can be executed, but memory access permissions may be violated if the code is not marked as executable

Engineering Contradiction:
Improvecode execution capabilityVSAvoidmemory access permission compliance
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent introduces a preliminary action step where code is explicitly loaded with executable permissions before execution. The LOAD_AS_IF_FETCH instruction pre-loads code from a source address into a destination register with executable permission attributes set, ensuring that when the code is subsequently executed, it has the proper permission flags already in place, thus avoiding permission violations.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If code conversion is performed between different instruction set architectures, then compatibility is improved, but permission bit handling becomes complex

Engineering Contradiction:
Improveinstruction set architecture compatibilityVSAvoidpermission bit management
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent uses an intermediary mechanism in the form of the LOAD_AS_IF_FETCH instruction that handles permission bit translation between different instruction set architectures. This intermediary instruction automatically manages the conversion of permission attributes during the code loading process, shielding the complexity of permission bit management from the rest of the system while enabling cross-architecture code conversion.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If traditional load instructions are used to load code, then simple loading is achieved, but executable permission is not granted causing execution failures

Engineering Contradiction:
Improveinstruction simplicityVSAvoidcode executability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent merges multiple functions into a single LOAD_AS_IF_FETCH instruction: it combines the code loading function with the executable permission attribution function. This unified instruction simultaneously performs the loading operation and sets the executable permission bit, eliminating the need for separate permission-setting operations and ensuring code executability in a single step.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP2889757B1A load instruction for code conversion
Publication Date: 2021.04.28 INTEL CORP
  • EP2889757B1 patent drawingFigure 1
  • EP2889757B1 patent drawingFigure 2
  • EP2889757B1 patent drawingFigure 3

AI summary

Embodiments of an invention for a load instruction for code conversion are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction having a source operand to indicate a source location and a destination operand to indicate a destination location. The execution unit is to execute the instruction. Execution of the instruction includes checking the access permissions of the source location and loading content from the source location into the destination location if the access permissions of the source location indicate that the content is executable.