Processor Instruction Execution With Protected Load-Store Buffering
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Solution Overview
Problem
Existing security measures to protect sensitive data from fault attacks and side-channel analysis in electronic devices require significant hardware modifications, such as increased data word size and bus width, leading to high costs and performance impacts.
Innovation Solution
A method for secure execution of instructions by a processor that involves separate operations for copying protected data and associated security information, using a load and store unit as a temporary buffer, without requiring bus width expansion, and includes integrity checks and transformations based on security information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate operations are used to copy protected data and security information, then data security is enhanced, but execution time increases
Solution Approach 1:
The patent segments the data transfer process into separate operations: one for copying protected data from memory to the load/store unit, and another for copying security information to the execution unit. This segmentation allows each operation to be optimized independently and enables parallel processing paths, enhancing security through separate validation while managing execution time through efficient pipeline utilization.
2Reliability
If security information is stored and processed alongside protected data, then protection against attacks is improved, but data size and storage requirements increase
Solution Approach 1:
The patent introduces a load/store unit as an intermediary component between memory and the execution unit. This intermediary temporarily holds both protected data and security information during the transfer process, enabling validation and processing without permanently increasing storage requirements in the execution units or registers. The intermediary facilitates secure data flow while maintaining efficient use of storage resources.
3Reliability
If hardware design is adapted to handle security information, then security measures can be applied throughout the execution chain, but hardware cost and complexity increase
Solution Approach 1:
The patent designs the load/store unit to perform multiple functions: it acts as a temporary storage buffer for protected data, a validation point for security information, and a coordination interface between memory and execution units. This multi-functional design eliminates the need for separate dedicated hardware components for each security function, reducing overall hardware complexity while maintaining comprehensive security coverage throughout the execution chain.
Data Source
AI summary
Provided is a method for a secure execution of a first instruction by a processor of an electronic system comprising fetching said first instruction in an execution pipeline of the processor, and determining if said first instruction to be executed is a load instruction to be protected for loading protected data, or a store instruction to be protected for storing protected data, and associated security information from said at least one memory to the processor registers. The method includes executing sequentially at least a first operation, a second operation and a third operation, depending on whether said first instruction is a load instruction or store instruction. Other embodiments disclosed.