Arithmetic Processor Load Unit for Constant Data Handling
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Solution Overview
Problem
Conventional arithmetic processors face inefficiencies in data storage, particularly when handling constant data, as they often require allocating constant values to registers intended for variables, leading to data storage area shortages and increased program size when extending instruction lengths to accommodate constant values.
Innovation Solution
The proposed arithmetic processor includes a load unit that loads constant data from a data memory and stores it in a specific register, allowing for incremental address updates, thereby freeing up registers for other operations and eliminating the need for frequent load instructions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If constant data is stored in registers R0 to R15, then constant data can be accessed during operations, but registers intended for variables become unavailable leading to data storage area shortage
Solution Approach 1:
The patent extracts the function of storing constant data from the general-purpose registers R0 to R15 by introducing a dedicated data memory DM. This allows registers to be reserved exclusively for variable storage while constant data is loaded from DM when needed, resolving the conflict between constant data storage and variable register availability
Solution Approach 2:
The patent introduces a load unit as an intermediary component that mediates between data memory DM and the register file RF. The load unit transfers constant data from DM to registers only when required by instructions, enabling efficient constant data access without permanently occupying registers, thus maintaining both data storage capacity and register versatility
2Ease of operation
If instruction length is extended to accommodate constant values, then constant data can be specified in instructions, but program size increases
Solution Approach 1:
The patent segments the data specification function by separating constant data storage from instruction encoding. Instead of embedding constant values directly in extended instructions, the system uses separate load instructions that reference constant data stored in data memory DM, keeping instruction lengths compact while enabling constant value access
Solution Approach 2:
The patent adds a new dimension to data access by introducing a separate data memory space DM distinct from program memory PM. This allows constant data to be accessed through load instructions without extending the instruction format, effectively moving constant value specification from the instruction dimension to the memory address dimension
Data Source
AI summary
An arithmetic processor of an embodiment comprises program counter, a program memory, registers, and a decoder. Also the arithmetic processor comprises an arithmetic unit that carries out an operation using the operand and operator acquired from the registers based on a decode result by the decoder, a data memory that stores constant data and an address in association with the data, and a load unit that comprises a load data address storing unit that stores a load data address indicating an address where the constant data is stored; andan increment unit that updates the load data address stored in the load data address storing unit. The load unit loads, from the data memory, constant data corresponding to an address specified by an operand of a load instruction from the decoder, and stores the constant data in a specific one of the registers.