Processor Load Balancing via Volunteer Information

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Solution Overview

Problem

Existing load balancing methods in computer systems, such as Round-Robin and Lightest-Loaded, lead to excessive thread migration and poor scalability due to reliance on thread launch policies that amplify load imbalances and require frequent processor queue scanning, resulting in decreased system performance and throughput.

Innovation Solution

A method where processors 'volunteer' by comparing their loads to determine the volunteer processor for thread launch, updating the volunteer information if their load is lower, allowing new threads to be launched on the processor with the lightest load, thereby reducing load imbalances and improving scalability without scanning other processors' queues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If Round-Robin load balancing is used, then thread distribution is simple to implement, but load imbalances are exaggerated leading to excessive thread migration

Engineering Contradiction:
Improveease of implementationVSAvoidload balance stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Each processor independently determines its own thread launch status by comparing its run queue length against a threshold, eliminating the need for centralized load balancing control and inter-processor communication

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system changes the thread launch decision parameter from fixed round-robin selection to dynamic threshold-based comparison, where processors with run queue length below threshold become thread launch processors

Inventive Principle:
Principle #35Parameter changes

2Reliability

If Lightest-Loaded load balancing is used, then load imbalances are reduced, but system performance decreases due to frequent cache disturbances from scanning all processors

Engineering Contradiction:
Improveload balance stabilityVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Processors independently evaluate their own load status using local threshold comparison rather than requiring centralized scanning of all processor queues, eliminating cache disturbances from inter-processor memory access

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention extracts the load balancing decision-making process from the traditional centralized model and places it locally at each processor, removing the need for processors to scan and compare against all other processors

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of manufacture

If Run-With-Parent load balancing is used, then implementation is simple and fast, but large load imbalances occur when many new threads are created

Engineering Contradiction:
Improveease of implementationVSAvoidload distribution balance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The system changes the thread launch decision from always using parent processor to dynamic selection based on run queue length threshold, allowing new threads to be launched on any processor meeting the threshold criterion

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7594233B2Processing thread launching using volunteer information
Publication Date: 2009.09.22 HEWLETT PACKARD ENTERPRISE DEV LP
  • US7594233B2 patent drawing
  • US7594233B2 patent drawing
  • US7594233B2 patent drawing

AI summary

A method of and computer system for selecting a processor of a computer system on which to launch a processing thread is described. Each processor load is compared with a volunteer load of a volunteer information. If the processor load is lower than the volunteer load, the volunteer information is updated with the compared processor information. If the compared processor is the current volunteer and the compared processor load is higher than the volunteer load, the volunteer information is updated with the compared processor information.