Processor Loading Reduction via Prime Period Scheduling
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Solution Overview
Problem
Processor loading is degraded due to the coincidence of periodic housekeeping tasks, which temporarily overloads the processor and affects its performance in executing other tasks, especially in systems with limited processing power.
Innovation Solution
Deriving actual time periods with no common divisor from specified time periods for executing housekeeping operations, typically by selecting the nearest prime number time periods, to reduce the likelihood of simultaneous task execution and mitigate temporary loading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If periodic housekeeping tasks are executed at their specified time periods, then task execution timing is precise and predictable, but processor loading increases when tasks coincide
Solution Approach 1:
The patent changes the time period parameters of periodic tasks from their specified values to derived values with no common divisors. This parameter transformation ensures that tasks execute at slightly different intervals, preventing simultaneous execution and reducing processor loading while maintaining reliable periodic execution.
Solution Approach 2:
The patent uses periodic action by deriving actual time periods from specified time periods such that the ratio between any two actual periods is an irrational number. This creates a non-repeating pattern of task executions that avoids periodic overlaps, thereby reducing processor loading during housekeeping operations.
2Productivity
If actual time periods with no common divisor are derived from specified time periods, then task coincidence is reduced and processor loading decreases, but task execution deviates from specified timing
Solution Approach 1:
The patent transforms the time period parameters from specified values to derived values that are very close to the original specifications. The derivation process ensures minimal deviation while achieving the critical property of having no common divisors, thus balancing timing accuracy with load reduction.
3Ease of operation
If multiple periodic tasks are scheduled with common time periods, then scheduling is simple and predictable, but simultaneous execution causes temporary processor overload
Solution Approach 1:
The patent automatically derives time period parameters for periodic tasks such that no two tasks share a common divisor. This systematic parameter transformation maintains scheduling simplicity while eliminating the possibility of simultaneous task execution, thereby preventing processor overload.
4Reliability
If housekeeping tasks are executed frequently to maintain system performance, then system responsiveness is improved, but processor loading increases and affects other tasks
Solution Approach 1:
The patent implements housekeeping tasks as periodic operations with derived time periods that have no common divisors. This ensures frequent execution for system maintenance while distributing the load across different time intervals, preventing temporary overloads and maintaining processor availability for other tasks.
Data Source
AI summary
A method includes, in a processor, receiving first and second operations for periodic execution with respective specified time periods. Respective actual time periods having no common divisor are derived from the specified time periods. The first and second operations are executed periodically with the respective actual time periods.