Processor Loading Calculation via Switching Action Detection

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Solution Overview

Problem

Conventional CPU loading calculation methods in electronic devices cause additional loading to the CPU when higher precision is required, as they rely on increasing the Hz value, leading to increased timer interrupts and processing burdens.

Innovation Solution

A loading calculation method and system that detect processor switching actions, determine time intervals, generate scheduling log files, and calculate processor loading, thereby avoiding the need for higher Hz values and reducing CPU loading.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the Hz value is increased to improve loading calculation precision, then the loading calculating precision is improved, but the CPU has to process more timer interrupts causing additional loading

Engineering Contradiction:
Improveloading calculating precisionVSAvoidCPU loading
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent extracts the loading calculation function from the timer interrupt mechanism. Instead of using timer interrupts to sample CPU loading (which increases CPU burden when Hz is raised), the invention detects switching actions of the processor and generates a log file that records scheduling information. This separates the measurement function from the timing mechanism, allowing precise loading calculation without increasing timer interrupt frequency.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates a log file as a copy of the processor's switching actions and scheduling behavior. Rather than directly measuring CPU loading through frequent timer interrupts, the system generates a log file that replicates the scheduling information, which can then be analyzed to calculate loading. This copying approach allows precise measurement without the overhead of high-frequency timer interrupts.

Inventive Principle:
Principle #26Copying

2Measurement precision

If the sampling method is used with higher Hz values to achieve better precision, then the loading calculation precision increases, but the additional timer interrupts increase the processing burden on the CPU

Engineering Contradiction:
Improveloading calculation precisionVSAvoidCPU energy consumption
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The patent extracts the measurement function from the timer interrupt mechanism. Instead of relying on timer interrupts to sample CPU loading (which consumes more energy when Hz is increased), the system detects switching actions and generates a log file for analysis. This separation eliminates the energy overhead associated with high-frequency timer interrupts while maintaining measurement precision.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary detection of switching actions and generates the log file in advance, before the actual loading calculation is needed. By detecting switching actions and recording them in a log file beforehand, the system avoids the need for continuous high-frequency sampling during the calculation phase, thereby reducing CPU energy consumption while preserving measurement precision.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9830242B2Loading calculation method and loading calculation system for processor in electronic device
Publication Date: 2017.11.28 MEDIATEK INC
  • US9830242B2 patent drawing
  • US9830242B2 patent drawing
  • US9830242B2 patent drawing

AI summary

The present invention provides a loading calculation method and a loading calculation system for a processor in an electronic device is disclosed. The loading calculation system comprises: a detecting unit, a determining unit, a generating unit, and a calculating unit. The loading calculation method comprises: detecting a plurality of switching actions of the processor to generate a detecting result; determining a time interval to separate the detecting result to generate a plurality of time periods; generating a log file of scheduling according to the detecting result and the plurality of time periods; utilizing the processor for enabling the log file of scheduling; and calculating the processor loading according to the log file of scheduling.