Processor Voltage and Frequency Margin Optimization
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Solution Overview
Problem
Computer systems face challenges in dynamically adjusting voltage and frequency settings to balance power management, reliability, and efficiency, as altering these settings can increase susceptibility to noise events and reduce power efficiency, while aging processors require different margins for robust operations.
Innovation Solution
The solution involves dynamically monitoring and adjusting voltage and frequency margins based on workload schedules, using noise stress marks during the 'bring-up' operation to calibrate sensors, and periodically executing system tests to maintain operational stability throughout a processor's lifetime, leveraging spare cycles and configurable conditions like aging and temperature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If voltage and frequency settings are dynamically adjusted for power management, then power efficiency is improved, but susceptibility to noise events increases and reliability deteriorates
Solution Approach 1:
The patent applies dynamics by making the voltage and frequency margins adjustable rather than fixed. The system dynamically adapts margin settings based on processor aging stage and operating conditions, allowing optimal balance between power efficiency and reliability at different times in the processor lifecycle
Solution Approach 2:
The patent changes physical parameters (voltage margin and frequency margin) based on processor aging and operational context. By modifying these electrical parameters dynamically, the system optimizes power efficiency while maintaining adequate noise margins for reliable operation
2Reliability
If voltage and frequency margins are increased for reliability, then susceptibility to noise events decreases, but power consumption increases and power efficiency deteriorates
Solution Approach 1:
The system dynamically adjusts margin levels based on processor aging stage. New processors operate with smaller margins for optimal power efficiency, while aging processors automatically increase margins to maintain reliability, avoiding unnecessary power consumption throughout the processor lifecycle
Solution Approach 2:
The system performs preliminary characterization during manufacturing to establish baseline margin requirements. This preliminary action enables the system to predict when margin increases will be necessary based on aging, allowing proactive adjustment before reliability degradation occurs
3Use of energy by moving object
If fixed margins are used for new processors, then power efficiency is optimized, but operational stability deteriorates as processors age
Solution Approach 1:
The patent implements dynamic margin adjustment that adapts to processor aging. The system transitions from fixed small margins in new processors to progressively larger margins as the processor ages, maintaining operational stability throughout the processor lifecycle without sacrificing power efficiency in the early stage
Solution Approach 2:
The system incorporates feedback mechanisms that monitor processor aging and operational conditions, using this information to adjust margin settings appropriately. This feedback loop ensures operational stability is maintained as the processor degrades over time
Data Source
AI summary
Various embodiments are provided for providing optimized margins of processors in a computing environment. Margins of voltage, frequency, or a combination thereof may be dynamically monitored and adjusted for a executing a processor based a workload scheduled during an event.