Processor Memory Access Monitoring for Unauthorized Read Detection

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Solution Overview

Problem

Modern processor architectures with branch prediction and out-of-order execution mechanisms pose security risks due to unauthorized data reading, as demonstrated by attacks like 'Meltdown' and 'Spectre', which can lead to confidential information theft.

Innovation Solution

A processor checking method and device that acquire and analyze access records to detect unauthorized read operations, setting a time window to verify access authority and sending security alerts to prevent malicious data access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If branch prediction mechanism and out-of-order execution mechanism are introduced to improve processing efficiency, then processor performance is improved, but security risks increase due to unauthorized data reading

Engineering Contradiction:
Improveprocessor performanceVSAvoidsecurity risks
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a monitoring mechanism that acts as an intermediary between the processor's out-of-order execution units and the memory access system. This intermediary records and tracks memory access operations, enabling security verification without disrupting the processor's optimized execution flow, thus maintaining performance while mitigating security risks

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a feedback mechanism where memory access records are continuously monitored and analyzed. When unauthorized access patterns are detected, the system provides feedback to rollback or block further operations, creating a closed-loop security system that maintains processor performance while preventing security breaches

Inventive Principle:
Principle #23Feedback

2Reliability

If access records are monitored and analyzed to detect unauthorized operations, then security is improved, but system complexity increases

Engineering Contradiction:
Improveprocessor securityVSAvoidchecking system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the security monitoring function into a separate, dedicated module that independently tracks memory access records. This extraction allows the security checking mechanism to operate without complicating the core processor architecture, maintaining simplicity while improving security

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates a copy of the access record tracking system that parallel-monitors memory operations without interfering with the primary processor flow. This copying approach enables security verification through duplication rather than complex integration, reducing system complexity while enhancing security

Inventive Principle:
Principle #26Copying

3Measurement precision

If time window verification is implemented to check access authority, then detection precision is improved, but processing time increases

Engineering Contradiction:
Improveunauthorized operation detection precisionVSAvoidverification time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent pre-establishes time window parameters and access authority records before verification is needed. By preparing these reference data structures in advance, the actual verification process during runtime requires only simple comparisons rather than complex calculations, thereby improving detection precision while minimizing time loss

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies partial verification by focusing time window checks only on suspicious or high-risk access patterns rather than uniformly verifying all memory operations. This selective approach maintains high detection precision for critical cases while reducing overall processing time overhead

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11062020B2Processor checking method, checking device and checking system
Publication Date: 2021.07.13 TSINGHUA UNIVERSITY
  • US11062020B2 patent drawing
  • US11062020B2 patent drawing
  • US11062020B2 patent drawing

AI summary

The present disclosure provides a processor checking method, a checking device and a checking system. The method includes acquiring an access record to a memory by a processor during a running process, the access record includes a read operation information and a corresponding time information, determining whether there is a read operation information corresponding to a high access authority in the access record, and when there is a read operation information corresponding to a high access authority, determining whether the read operation information corresponding to the high access authority belongs to an unauthorized operation. According to embodiments of the present disclosure, the behavior of the processor reading data from the memory is checked and analyzed, thereby preventing the security problems caused by malicious use of unauthorized reading operation.