Heterogeneous Processor Memory Extension via Virtual Address Mapping

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Solution Overview

Problem

In heterogeneous processing systems with multiple processors, efficiently accessing and transferring data between different processors' memories is challenging, particularly due to the need for overlapping computations and data transfers across various processing units.

Innovation Solution

The system employs a host processor to map virtual addresses of one processor's memory to physical addresses of switch and bus circuitry, allowing another processor to directly access the memory using these mapped physical addresses through memory extension operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If data is transferred between processors using traditional memory access methods, then data can be accessed between different processors, but the transfer time and system complexity increase due to intermediate data transfers

Engineering Contradiction:
Improvedata transfer timeVSAvoidsystem complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent merges the memory spaces of multiple processors by mapping virtual addresses of one processor's memory to physical addresses accessible by another processor. This consolidation allows processors to access each other's memory directly without intermediate transfer operations, reducing both transfer time and system complexity while maintaining address space isolation through virtual address mapping.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If intermediate data transfers are used between processors, then data can be moved between memory spaces, but the number of transfer operations and processing overhead increase

Engineering Contradiction:
Improvedata access efficiencyVSAvoidnumber of transfer operations
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent extracts the intermediate transfer step from the data access path by enabling direct memory extension operations. Instead of transferring data through intermediate buffers or memory copies, the system allows processors to directly access remote memory spaces through mapped physical addresses, eliminating redundant transfer operations and improving data access efficiency.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If virtual address mapping is implemented for memory extension, then processors can access remote memory directly, but the address mapping complexity increases

Engineering Contradiction:
Improvedirect memory access capabilityVSAvoidaddress mapping complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent introduces a host processor as an intermediary that manages the virtual to physical address mapping. The host processor translates virtual addresses from one processor's memory space to physical addresses accessible by other processors, abstracting the complexity of direct memory mapping while enabling seamless cross-processor memory access operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250117336A1Data access in a heterogeneous processing system with multiple processors
Publication Date: 2025.04.10 SAMBANOVA SYSTEMS INC
  • US20250117336A1 patent drawing
  • US20250117336A1 patent drawing
  • US20250117336A1 patent drawing

AI summary

A data access method and apparatus for a heterogeneous processing system includes a host processor, a first processor coupled to a first memory, a second processor coupled to a second memory, and switch and bus circuitry that communicatively couples the host processor, the first processor, and the second processor. The host processor maps virtual addresses of the second memory to physical addresses of the switch and bus circuitry. The first processor is configured to directly access the second memory using the mapped physical addresses, and may be configured to directly access the second memory for reading and writing data while executing an application.