Processor Mode Locking via Virtual Register
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Solution Overview
Problem
Current cloud computing systems face security vulnerabilities due to the use of 16-bit processing modes during booting, which can be exploited, and there is a need to transition securely from one processing mode to another without reverting to the initial mode.
Innovation Solution
The method involves operating a processor in a first processing mode, setting control bits to configure it for a different mode, providing a virtual register with locking bits to prevent reconfiguration to the initial mode, and using monitoring and interception modules to enforce this transition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the processor operates in 16-bit processing mode during booting, then the system can initialize the operating system, but security vulnerabilities are introduced that can be exploited
Solution Approach 1:
The system performs the necessary 16-bit mode operations during booting as a preliminary action, then transitions to 32-bit or 64-bit mode before normal operation begins. This preliminary execution of 16-bit code during initialization, followed by a mode transition, allows the system to benefit from 16-bit compatibility during boot while eliminating security vulnerabilities during normal operation.
2Object-affected harmful factors
If the processor is configured to operate in a different processing mode, then security vulnerabilities are minimized, but the ability to revert to the initial mode is lost
Solution Approach 1:
A mode transition mechanism acts as an intermediary between 16-bit and 32/64-bit modes. This intermediary controls the transition unidirectionally from 16-bit to higher modes while preventing reversal, ensuring security by eliminating the ability to revert to vulnerable 16-bit mode while still allowing the system to operate in higher modes that minimize security vulnerabilities.
3Reliability
If monitoring of control bits is implemented, then unauthorized mode changes are prevented, but system complexity increases
Solution Approach 1:
The monitoring function is extracted as a separate, dedicated mechanism that specifically watches control bits for unauthorized changes. By isolating this monitoring function, the system achieves reliable detection of unauthorized mode changes without requiring complex integration throughout the entire system architecture.
Solution Approach 2:
The monitoring mechanism provides feedback when control bits are attempted to be changed unauthorizedly. This feedback system detects attempts to switch modes and triggers appropriate responses, ensuring that only authorized mode transitions occur while maintaining system reliability.
Data Source
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AI summary
Implementations of the present disclosure are directed to a method, system and computer-readable medium for operating a processor in a data processing apparatus in a first processing mode; setting one or more control bits of a control register of the processor to configure the processor to operate in a different second processing mode; providing a virtual register in a virtual machine executing on the data processing apparatus, the virtual register having one or more locking bits corresponding to the control bits of the control register; setting a value of the one or more locking bits of the virtual register; and in response to setting the value of the one or more locking bits, preventing the processor from being configured to operate in the first processing mode.