Processor Performance Measurement for Neural Network Layers
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Solution Overview
Problem
Current methods for measuring processor performance in neural networks, such as CNNs, face challenges in accurately measuring performance for each layer without requiring significant memory capacity or modifying the original execution code, and struggle to identify which execution units are executing specific layers.
Innovation Solution
A processor performance measurement apparatus that estimates and measures the performance of processing units by analyzing memory access patterns, instruction execution, and data addresses to classify execution units and determine corresponding layers, allowing for performance measurement without additional code or memory requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If memory access monitoring is implemented to measure processor performance for each layer, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent introduces a processor as an intermediary component that monitors memory access between the execution units and memory. This processor observes memory access patterns, infers which layers are being executed, and measures performance metrics without requiring direct modification of the neural network execution code or additional memory resources. The processor acts as a mediator that translates memory access information into layer performance measurements.
2Measurement precision
If additional code is added to track execution units for performance measurement, then measurement precision is improved, but ease of operation deteriorates
Solution Approach 1:
The patent employs self-service by utilizing the existing memory access information that is already generated during neural network execution. The processor monitors memory access patterns that naturally occur during layer execution and uses this information to identify which layers are being processed. This approach eliminates the need to add tracking code to the original execution code, as the system uses the memory access information that is already being generated by the normal execution process.
3Measurement precision
If memory capacity is increased to store performance data for each layer, then measurement precision is improved, but loss of substance worsens
Solution Approach 1:
The patent extracts only the essential information needed for performance measurement from the memory access patterns. Instead of storing complete performance data for all possible layers, the processor monitors memory access information, identifies which layers are currently being executed based on access patterns, and measures performance metrics only for those active layers. This extraction approach minimizes memory usage while maintaining measurement precision for the layers that are actually being processed.
Data Source
AI summary
A processor performance measurement apparatus according to an embodiment includes a processor, in which the processor detects that a memory access occurs, the memory access being required to execute processing units or execute execution units by a processor to be measured, performs first estimation for estimating switching of the processing units or the execution units and second estimation for estimating which of the one or more processing units the processing unit being executed is or to which of the one or more processing units the execution unit being executed corresponds based on an address of an access destination of the memory access, measures respective performances in the processing units or the execution units based on an estimation result of the first estimation, and aggregates respective measurement results of the performances for each of the processing units based on an estimation result of the second estimation.