Processor Block Storage Interface via NVM Mode Switching
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Solution Overview
Problem
Complexity in accessing different types of memory and storage in computing systems, such as volatile and non-volatile memory, due to varying access techniques and error handling methods, hinders efficiency and performance.
Innovation Solution
Implementing a non-volatile memory (NVM) that supports multiple modes of operation, including volatile memory, persistent memory, and block mode storage, allowing all modes to be accessed through a system address space for efficient and fast access, and leveraging persistent memory error handling techniques to improve efficiency and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple different types of memory and storage are used in computing systems, then storage capacity and functionality are improved, but system complexity increases
Solution Approach 1:
The patent implements a non-volatile memory device that can operate in multiple modes (volatile memory mode, persistent memory mode, and block storage mode) through a single device. This multi-functionality allows the system to access different types of storage through a unified interface, reducing system complexity while maintaining versatile storage capabilities. The device responds to different command types (e.g., read/write commands vs. block read/write commands) to switch between operational modes.
Solution Approach 2:
The patent introduces a block interface as an intermediary layer between the processor and the non-volatile memory device. This block interface translates block-based storage operations into memory-based operations, allowing the processor to access block storage using standard memory access techniques. This intermediary simplifies the interface complexity by providing a unified access method for different storage types.
2Speed
If different access techniques are used for different memory types, then access optimization is improved, but ease of operation deteriorates
Solution Approach 1:
The non-volatile memory device dynamically switches between different operational modes based on the type of command received. When receiving standard read/write commands, it operates in volatile memory mode with fast access characteristics. When receiving block read/write commands, it switches to block storage mode optimized for bulk operations. This dynamic mode switching allows the system to optimize access techniques for different operation types while maintaining ease of operation through a unified interface.
Data Source
AI summary
In one embodiment, a processor includes a core having a fetch unit to fetch instructions, a decode unit to decode the instructions, and one or more execution units to execute the instructions. The core may further include: a first pair of block address range registers to store a start location and an end location of a block range within a non-volatile block storage coupled to the processor; and a block status storage to store an error indicator responsive to an occurrence of an error within the block range during a block operation. Other embodiments are described and claimed.