Processor Page Fault Handling via Hardware-Memory Unit Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In computer systems using demand paging, the increasing speed of storage devices exacerbates page fault processing delays, as the operating system handles page faults, leading to resource pollution and inefficiencies.
Innovation Solution
A method and processor architecture that enables direct hardware processing of page faults by a processor, utilizing a memory management unit to check page table entries and a fault processing unit to handle page faults, reducing reliance on the operating system and improving data access speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the operating system handles page fault processing, then the processing logic is comprehensive and reliable, but the page fault processing time increases and resource pollution occurs
Solution Approach 1:
The patent segments page fault processing into two parts: hardware-level operations (address translation, page table lookup, data loading) performed by the processor, and software-level operations (exception handling, additional information parsing) performed by the operating system. This segmentation allows the time-critical path to be handled in hardware while maintaining OS control for complex logic.
Solution Approach 2:
The patent introduces a page fault processing completion message as an intermediary mechanism that enables communication between the hardware fault processing unit and the operating system. This message passes necessary information (virtual address, physical address, additional information) from hardware to software, allowing the OS to resume processing without re-parsing raw data.
2Measurement precision
If the operating system parses additional information in page table entries, then the processing is accurate, but the processor resources are polluted and efficiency decreases
Solution Approach 1:
The processor's fault processing unit performs self-service by autonomously parsing additional information (such as swap offsets) from page table entries during hardware-level page fault handling. This eliminates the need for the operating system to re-parse this information, reducing processor pollution and improving efficiency while maintaining parsing accuracy through dedicated hardware logic.
3Speed
If storage device speed increases, then data transfer capability improves, but the influence of operating system page fault processing delay on overall performance increases
Solution Approach 1:
The patent replaces the software-based (mechanical) page fault processing system with a hardware-based processing unit within the processor. This substitution moves page fault handling from the operating system's software execution path to dedicated hardware circuitry, significantly reducing processing delay and allowing the system to fully utilize high-speed storage devices without being bottlenecked by OS processing time.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
Disclosed is a method for processing a page fault. The method includes performing demand paging depending on an application operation in a system including a processor and an operating system, and loading, at the processor, data on a memory in response to the demand paging.