Processor Performance Monitoring Fixed Counters Multiplexing

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Solution Overview

Problem

Current mechanisms for accessing performance monitoring information in processors suffer from lack of precision and resource impacts, particularly in top-down microarchitecture analysis (TMA) methodologies, due to inefficient use of programmable counters and slow access to performance metrics registers.

Innovation Solution

Implementing a set of fixed counters for highest hierarchical levels in the performance monitoring unit to collect precise and fast metrics, reducing the need for programmable counters and minimizing multiplexing, while utilizing PEBS and NPEBS mechanisms to track precise and non-precise events without intervention from performance monitoring interrupts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If programmable counters are used for performance monitoring, then versatility in monitoring different events is improved, but measurement precision and access speed deteriorate due to multiplexing requirements

Engineering Contradiction:
Improveversatility in monitoring different eventsVSAvoidprecision of performance metrics
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The performance monitoring unit is segmented into fixed counters for highest hierarchical levels and programmable counters for lower levels. This segmentation allows fixed counters to provide precise, fast access to critical metrics while programmable counters handle more flexible monitoring needs, resolving the contradiction between versatility and precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a hierarchical dimension to performance monitoring, organizing counters across multiple levels (highest hierarchical level to lower levels). This dimensional organization allows simultaneous access to both precise fixed counters and versatile programmable counters through different hierarchical paths.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If programmable counters are used for performance monitoring, then adaptability is improved, but access speed deteriorates due to slow access to performance metrics registers

Engineering Contradiction:
Improveadaptability of performance monitoringVSAvoidaccess speed to performance metrics
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

By segmenting the counter system into fixed and programmable components at different hierarchical levels, the patent enables fast access to critical performance metrics through fixed counters while maintaining adaptability through programmable counters for less time-critical monitoring.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different parts of the performance monitoring system have different qualities: fixed counters provide high-speed, precise access for critical metrics, while programmable counters provide adaptable access for other events. This local differentiation resolves the speed-adaptability contradiction.

Inventive Principle:
Principle #3Local quality

3Productivity

If multiplexing is used in performance monitoring, then resource utilization is improved, but fidelity of performance profiles deteriorates

Engineering Contradiction:
Improveresource utilization in performance monitoringVSAvoidfidelity of performance profiles
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent segments the monitoring system to dedicate fixed counters to highest hierarchical level events, eliminating multiplexing for these critical metrics and ensuring high fidelity, while programmable counters handle multiplexed monitoring for other events.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250110848A1Circuitry and methods for enhanced selection of performance monitoring
Publication Date: 2025.04.03 INTEL CORP
  • US20250110848A1 patent drawing
  • US20250110848A1 patent drawing
  • US20250110848A1 patent drawing

AI summary

Techniques for performance monitoring are described. In certain examples, an apparatus (e.g., a processor) includes an execution circuit to execute one or more instructions; a performance monitoring counter; a control register comprising a threshold field; and a performance monitor control circuit to increment the performance monitoring counter in response to a performance monitoring event of the one or more instructions being equal to, but not greater than, the threshold field.