Processor Control Device with Polling Units for CPU Load Reduction

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Solution Overview

Problem

Existing processor control devices face increased CPU load and power consumption when performing polling processing for multiple DMA transfers, as they need to repeatedly check the status of each transfer and wait for their completion, leading to inefficient operation and higher power usage.

Innovation Solution

A processor control device with multiple polling processing units that can independently manage the execution status of modules, allowing the processor to stop operations until processing is finished, reducing the need for continuous polling and minimizing power consumption by using clock control circuits to halt the processor when necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the CPU performs polling processing by software to check DMA transfer status, then the CPU can monitor the execution status of modules, but the CPU load increases and power consumption increases

Engineering Contradiction:
Improvemonitoring module execution statusVSAvoidCPU load
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The polling processing unit is integrated into the module itself, allowing the module to automatically generate polling signals and manage its own execution status without requiring continuous CPU intervention. This self-service mechanism reduces CPU load while maintaining reliable status monitoring.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The polling processing unit acts as an intermediary between the module and the CPU, handling the polling operations and status management autonomously. This mediator structure allows the CPU to be notified of module status changes without continuously polling, thereby reducing CPU workload.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If the CPU repeatedly checks status register values to determine branch execution, then the CPU can control processing flow, but the processing time increases and power consumption increases

Engineering Contradiction:
Improveprocessing flow controlVSAvoidwaiting time for DMA transfer
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The polling processing unit performs preliminary actions by continuously monitoring module execution status and generating polling signals in advance. This allows the CPU to be pre-notified of status changes, eliminating the need for repeated status checks and reducing waiting time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The polling processing unit implements a feedback mechanism where the module's execution status is continuously monitored and communicated back to the CPU through polling signals. This feedback loop allows the CPU to respond efficiently to module completion without continuous polling, reducing time loss.

Inventive Principle:
Principle #23Feedback

3Productivity

If multiple DMA controllers perform DMA transfers simultaneously, then data processing throughput increases, but the CPU has to manage multiple polling operations which increases complexity

Engineering Contradiction:
Improvedata processing throughputVSAvoidpolling processing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The polling processing function is segmented and distributed to individual polling processing units within each module. Each module manages its own polling operations independently, which simplifies the overall system complexity while allowing multiple modules to operate simultaneously for increased throughput.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each polling processing unit has local quality characteristics tailored to its specific module's needs, allowing independent polling management. This local quality approach enables multiple modules to perform DMA transfers simultaneously without creating centralized polling complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7356630B2Processor control device for stopping processor operation
Publication Date: 2008.04.08 SEIKO EPSON CORP
  • US7356630B2 patent drawing
  • US7356630B2 patent drawing
  • US7356630B2 patent drawing

AI summary

A processor control device includes a processor executing an instruction, a module coupled to the processor through a bus and processing independently from the processor, the module is provided in a plural number and a polling processing unit coupled to each module, the polling processing unit stopping an operation of the processor depending on an execution status of the module processing at a time of an access request from the processor.