Data Center Processor Power Optimization via Dynamic Task Binning

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Solution Overview

Problem

Existing methods for managing power consumption in data centers with multiple processors are inefficient, as they either rely on local information and fail to adapt to dynamic workload changes or are static and unable to quickly react to power demands, leading to suboptimal power usage and increased cooling costs.

Innovation Solution

A method that defines processor performance bins with varying power states, monitors processor metrics to model power consumption, and assigns tasks to the appropriate bins based on modeled power usage, allowing for dynamic task routing and localized power management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If local governors are used to control processor power states, then the processor can react quickly to changing architectural demands, but the decision process is made utilizing only local information and cannot adapt to dynamic workload changes across the cluster

Engineering Contradiction:
Improvereaction speed to architectural demandsVSAvoidadaptability to dynamic workload changes
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The patent combines local governor functionality with global workload information by having the workload manager receive performance metrics from multiple processors and make centralized scheduling decisions. This merges the quick local reaction capability with cluster-wide adaptability, resolving the contradiction between fast local response and global workload adaptability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system implements feedback loops where performance metrics from processors are continuously monitored and fed back to the workload manager, which adjusts task scheduling decisions accordingly. This feedback mechanism enables the system to adapt to dynamic workload changes while maintaining quick response times through iterative optimization.

Inventive Principle:
Principle #23Feedback

2Ease of manufacture

If static cluster configuration is used with heuristic-based task scheduling, then the system is simple to implement, but it cannot take dynamic workload execution characteristics into consideration

Engineering Contradiction:
Improveease of implementationVSAvoidability to handle dynamic workload characteristics
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent transforms the static cluster configuration into a dynamic system by implementing continuous monitoring of processor performance metrics and adaptive task scheduling. The workload manager dynamically adjusts task allocation based on real-time processor states, enabling the system to handle dynamic workload characteristics while building upon a relatively simple static foundation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system enables processors to self-report their performance metrics and workload characteristics, allowing the workload manager to make informed scheduling decisions without complex manual configuration. This self-service approach maintains ease of implementation while achieving dynamic adaptability through automated metric collection and analysis.

Inventive Principle:
Principle #25Self-service

3Use of energy by moving object

If global power state control is implemented to optimize cluster-wide power consumption, then overall power efficiency improves, but the system is less likely to react quickly to local changes in power demands

Engineering Contradiction:
Improveoverall power efficiencyVSAvoidreaction speed to local power demands
Core Design Contradiction:
Use of energy by moving objectVSSpeed

Solution Approach 1:

The patent segments the power management system into two levels: global workload management for overall power efficiency optimization and local processor-level governor control for quick response to local demands. This segmentation allows both global power optimization and local rapid response to coexist, resolving the contradiction between overall efficiency and local reaction speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system applies different control strategies at different levels: global workload scheduling optimizes overall power efficiency by considering cluster-wide metrics, while local processor governors handle rapid responses to local power demands. This local quality approach allows each level to optimize for its specific requirements, resolving the speed-efficiency trade-off.

Inventive Principle:
Principle #3Local quality

4Use of energy by moving object

If deeper power-saving states are used to maximize power savings, then power consumption decreases, but there is an increasing time penalty for state switching

Engineering Contradiction:
Improvepower consumptionVSAvoidtime penalty for state switching
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The workload manager implements partial power-saving actions by selecting moderate power states rather than always maximizing power savings. It balances power consumption reduction with acceptable performance levels, avoiding excessive state switching that would incur significant time penalties. This partial action approach optimizes the trade-off between power savings and switching overhead.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system dynamically changes processor operating parameters (frequency, voltage, power state) based on workload characteristics and performance requirements. By adjusting these parameters adaptively rather than using fixed deep power-saving states, the system reduces power consumption while minimizing the time penalty for state transitions through intelligent parameter selection.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9274585B2Combined dynamic and static power and performance optimization on data centers
Publication Date: 2016.03.01 ADVANCED MICRO DEVICES INC
  • US9274585B2 patent drawing
  • US9274585B2 patent drawing
  • US9274585B2 patent drawing

AI summary

Various datacenter or other computing center control apparatus and methods are disclosed. In one aspect, a method of computing is provided that includes defining plural processor performance bins where each processor performance bin has a processor performance state. At least one processor is assigned to each of the plural processor performance bins. Processor performance metrics of at least one of the processors are monitored while the at least one of the processors executes an incoming task. Processor power is modeled based on the monitored performance metrics. Future incoming tasks are assigned to one of the processor performance bins based on the modeled processor power.