Processor Power Management via Dynamic Frequency Scaling
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Solution Overview
Problem
Electronic devices, particularly battery-operated handheld devices, face high power consumption due to increased processor frequency and voltage, leading to inefficient power management, especially when operating in standby or idle modes.
Innovation Solution
A method of power management that dynamically adjusts the processor's power level by detecting workload rates and adjusting clock signal frequency and supply voltage based on averaged workload rates over different reference times, using a hysteresis and time-weight scheme to stabilize power levels and reduce consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the processor operates at high frequency to improve performance, then the processing speed is improved, but the power consumption increases
Solution Approach 1:
The patent implements dynamic frequency adjustment where the processor operating frequency is continuously modified based on detected workload rates. The system transitions from static high-frequency operation to dynamic frequency scaling, adjusting the frequency up when workload is high and down when workload is low, thereby resolving the contradiction between maintaining high performance and reducing power consumption.
Solution Approach 2:
The patent changes the operating parameters (frequency and voltage) of the processor based on detected workload patterns. By monitoring workload rates over different reference times and using hysteresis mechanisms, the system adjusts frequency and voltage parameters to match actual demand, transforming the fixed parameter operation into adaptive parameter modification that balances performance and power consumption.
2Use of energy by moving object
If the power level is frequently adjusted to match workload changes, then power consumption is reduced, but system stability deteriorates due to frequent changes
Solution Approach 1:
The patent applies preliminary action by using hysteresis mechanisms and multiple reference times (up reference time for frequency increase, down reference time for frequency decrease) before actually changing the power level. This preliminary evaluation period filters out transient workload fluctuations and ensures that power level changes are based on sustained workload patterns, reducing unnecessary frequent adjustments while maintaining stability.
Solution Approach 2:
The hysteresis mechanism acts as a cushioning layer between workload detection and power level adjustment. By requiring the workload rate to sustain certain thresholds for predetermined reference times before triggering power level changes, the system cushions against premature or excessive adjustments, thereby maintaining stability while still responding to genuine workload changes.
3Use of energy by moving object
If the processor frequency is reduced to save power in standby mode, then power consumption is reduced, but the response time to user input increases
Solution Approach 1:
The system dynamically adjusts the processor frequency based on detected workload patterns, transitioning between low-frequency power-saving mode and high-frequency performance mode. The dynamic adjustment mechanism ensures that the processor can quickly respond to user inputs by detecting workload changes and rapidly increasing frequency when needed, while maintaining low power consumption during idle periods.
Solution Approach 2:
The patent implements feedback mechanisms where the system continuously monitors workload rates and uses this information to adjust processor frequency. The feedback loop detects user input patterns and workload changes, then adjusts the operating frequency accordingly, ensuring that the processor maintains optimal performance when needed while minimizing power consumption during idle periods.
Data Source
AI summary
A method of power management detects a workload rate of a processor, increases a power level of the processor based on a first value that is an average of the detected workload rate over an up reference time, and decreases the power level of the processor based on a second value that is an average of the detected workload rate over a down reference time. The down reference time may be longer than the up reference time. A power management apparatus includes a processor, a workload detector configured to detect a workload rate of the processor, a power management unit configured to receive the workload rate of the processor and generate a level control signal indicating a power level of the processor, a voltage control unit configured to provide the processor with a supply voltage corresponding to the level control signal, and a clock control unit configured to provide the processor with a clock signal having a frequency corresponding to the level control signal.