Processor Power Control via Dynamic Instruction Issuance

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Solution Overview

Problem

Modern processors face significant power dissipation issues due to extensive operational units, and existing power throttling methods have limitations in effectively managing power consumption, particularly in graphics processors with numerous operational units.

Innovation Solution

A power consumption monitor determines when the cumulative power consumption of a group of operational units exceeds a threshold, triggering a filter to modify or suspend instruction issuance to those units, thereby controlling power usage through dynamic instruction issuance management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If power throttling is implemented by gating clock signal or limiting operating frequency, then power consumption is reduced, but processor productivity and execution speed deteriorate

Engineering Contradiction:

Improvepower consumptionVSAvoidprocessor execution speed

Core Design Contradiction:

Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent implements dynamic instruction issuance filtering that adjusts the rate of instruction delivery to operational units based on real-time power consumption conditions. The filter dynamically modifies instruction throughput without completely suspending operations, allowing the processor to adapt its execution rate to power constraints while maintaining operational continuity.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of instruction issuance rate rather than completely stopping clock signals or operations. By adjusting the frequency and volume of instructions sent to operational units, the system achieves power control while preserving the operational capability of the processor units.

Inventive Principle:

Principle #35Parameter changes

2Use of energy by moving object

If instruction issuance is suspended for operational units, then power consumption is reduced, but processor productivity and task completion rate deteriorate

Engineering Contradiction:

Improvepower consumptionVSAvoidtask completion rate

Core Design Contradiction:

Use of energy by moving objectVSProductivity

Solution Approach 1:

Instead of completely suspending instruction issuance, the filter applies partial action by selectively allowing some instructions to pass through while filtering others. This partial instruction issuance maintains enough processor activity to complete tasks while reducing power consumption to acceptable levels.

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The system implements periodic instruction issuance patterns where instructions are delivered in controlled intervals rather than continuously. This periodic delivery allows operational units to execute tasks while providing power consumption relief through controlled pauses in instruction flow.

Inventive Principle:

Principle #19Periodic action

3Loss of energy

If clock signal is gated to cut off delivery to operational units, then power dissipation is reduced, but processor reliability and operational continuity deteriorate

Engineering Contradiction:

Improvepower dissipationVSAvoidoperational continuity

Core Design Contradiction:

Loss of energyVSReliability

Solution Approach 1:

The instruction filter acts as an intermediary between the instruction stream and operational units. Rather than directly gating the clock signal, the filter intermediates by controlling instruction flow, which indirectly manages power consumption while preserving clock signal continuity and operational reliability.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The system replaces the mechanical approach of clock signal gating with a software/instruction-level control mechanism. Instead of physically interrupting the clock signal, the filter substitutes instruction issuance control to achieve power management, maintaining electrical continuity and system reliability.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8862924B2Processor with power control via instruction issuance

Publication Date: 2014.10.14 ADVANCED MICRO DEVICES INC

AI summary

Methods and apparatuses are provided for power control in a processor. The apparatus comprises a plurality of operational units arranged as a group of operational units. A power consumption monitor determines when cumulative power consumption of the group of operational units exceeds a threshold (e.g., either or both of the cumulative power threshold and the cumulative power rate threshold) during a time interval, after which a filter for issuing instructions to the group of operational units suspends instruction issuance to the group of operational units for the remainder of the time interval. The method comprises monitoring cumulative power consumption by a group of operational units within a processor over a time interval. If the cumulative power consumption of the group of operational units exceeds the threshold, instruction issuance to the group of operational units is suspended for the remainder of the time interval.