Processor Power OK Circuit Using Stable Reference Voltage

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Solution Overview

Problem

Existing Power OK (POK) signal generators lack accuracy in determining when the core voltage reaches the target voltage due to fluctuations in the main 3.3 Volt rail, leading to potential errors in processor startup.

Innovation Solution

A POK signal generator is developed using a precision reference source, voltage dividers, a multiplexer, and a comparator, with select signals derived from a digital-to-analog converter (DAC) code to accurately identify and assert the POK signal after a predetermined delay, ensuring the core voltage has exceeded the target reference voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If reference voltages are generated by dividing the main 3.3 Volt supply, then the POK signal can be generated across a broad range of core voltages, but the reference voltage fluctuates due to high current draws from components such as main memory, leading to inaccurate POK signal timing

Engineering Contradiction:
Improvesupport for broad range of core voltagesVSAvoidaccuracy of POK signal timing
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent introduces an intermediary voltage reference source that is electrically isolated from the fluctuating main 3.3V power supply. This intermediary reference voltage acts as a stable mediator for comparison against the core voltage, eliminating the harmful coupling between power supply fluctuations and voltage reference accuracy while still enabling broad core voltage support through programmable division ratios.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent performs preliminary stabilization by generating the reference voltage from a stable source before the comparison operation occurs. The reference voltage is pre-conditioned to be immune to subsequent fluctuations in the main power supply, ensuring that the timing determination is based on a stable reference rather than a fluctuating one.

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If the core voltage is reduced to minimize current leakage and power dissipation, then processor efficiency improves, but the POK signal generator must support a wider range of voltages from 0.775V to 1.550V, increasing system complexity

Engineering Contradiction:
Improvepower dissipationVSAvoidvoltage range support requirements
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent employs a programmable voltage division system where the division ratio can be dynamically adjusted based on the target core voltage. This dynamic configuration allows a single circuit to adapt to any core voltage within the 0.775V to 1.550V range, eliminating the need for multiple fixed circuits and reducing overall system complexity while supporting the full voltage range required for low-power operation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the electrical parameter of voltage division ratio to accommodate different core voltage requirements. By programmably adjusting this parameter, the system can support the broad voltage range needed for minimized power dissipation without requiring separate hardware for each voltage level, thus managing complexity through parameter flexibility rather than structural multiplication.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If voltage dividers are used to generate reference voltages for different core voltage segments, then the POK signal can be generated for various processors, but fluctuations in the main power supply adversely affect the proper timing of the POK signal

Engineering Contradiction:
Improvecompatibility with various processorsVSAvoidproper timing of POK signal
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces an intermediary voltage reference source that is electrically isolated from the fluctuating main 3.3V power supply. This intermediary reference voltage acts as a stable mediator for comparison against the core voltage, eliminating the harmful coupling between power supply fluctuations and voltage reference accuracy while still enabling broad core voltage support through programmable division ratios.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system incorporates feedback through the use of a stable voltage reference that continuously provides an accurate benchmark for comparison. The comparator uses this stable reference to determine when the core voltage has reached the target level, and this determination feeds back to control the POK signal assertion, ensuring reliable timing despite external power supply variations.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a reliable and accurate POK signal across a broad range of core voltages, reducing errors and ensuring proper processor startup by minimizing the impact of voltage fluctuations in the main power supply.

Implementation Method 1

A new POK signal generator employs a stable voltage reference that is not subject to the same fluctuations

Methodology Applied
Scientific EffectVoltage reference stabilization:

Implementation Method 2

The voltage dividers divide the stable reference voltage into a plurality of different reference voltages

Methodology Applied
Scientific EffectVoltage division: Electrical Resistance

Implementation Method 3

A comparator compares the selected reference voltage with the core voltage to generate a Power Fail Input (PFI) signal

Methodology Applied
Scientific EffectVoltage comparison:

Data Source

PatentUS7663517B1Accurate hardware Power OK (POK) generation methodology for processors with varying core voltage requirements
Publication Date: 2010.02.16 ORACLE AMERICAN INC
  • US7663517B1 patent drawing
  • US7663517B1 patent drawing
  • US7663517B1 patent drawing

AI summary

A method for configuring a circuit for providing a power OK (POK) signal is described. The method includes identifying a voltage range and voltage interval, dividing the voltage range into a plurality of segments, selecting a reference voltage for each segment, and selecting resistor values for a plurality of voltage dividers for dividing an output voltage from a precision voltage reference into each of the reference voltages. A power OK signal generator and method for generating a power OK signal are also described.