Processor Power Saving State Control via Dynamic Return Time Notification
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current power control applications for information processing apparatuses lack a mechanism to notify the operating system of a return time, which is necessary for adjusting the power saving states of CPUs and memory, especially in multifunction peripherals with varying power modes like print, scan, and waiting response modes, leading to inefficiencies in power management and responsiveness.
Innovation Solution
An information processing apparatus that includes a processor with a power control application operating on the OS, which communicates with connected devices to determine and notify the OS of a return time based on the power mode, allowing the OS to shift the processor to appropriate power saving states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the CPU shifts to deeper C-states (C7-C10) for power saving in S0ix mode, then power consumption is reduced, but the return time increases
Solution Approach 1:
The system dynamically adjusts the C-state selection based on the operational context and return time requirements. Different C-states (C7-C10) are selected depending on whether the system is in standby mode (requiring faster response) or waiting response mode (allowing deeper power saving), making the power management adaptive rather than static
Solution Approach 2:
The invention changes the parameter of return time notification from a fixed value to a variable that depends on the power mode. The power control application notifies the first device of different return times based on whether the system is in standby or waiting response mode, which then influences the CPU's C-state selection
2Loss of energy
If the system enters S0ix state with CPU in C7-C10 and memory in self-refresh mode, then power saving is improved, but the responsiveness and operability of the operation panel deteriorates
Solution Approach 1:
The system dynamically adjusts the depth of power saving states based on operational requirements. In standby mode, the CPU is prevented from entering the deepest C-states to maintain responsiveness, while in waiting response mode, deeper C-states are permitted for maximum power saving
Solution Approach 2:
Different quality levels of power saving are applied to different operational contexts. The system applies lighter power saving (shallower C-states) when operation panel responsiveness is needed, and heavier power saving (deeper C-states) when the system is in waiting response mode with no user interaction expected
3Reliability
If the network I/F saves received packets in its memory, then packet loss is prevented, but the memory capacity is finite causing packet discard when receiving continuous packets
Solution Approach 1:
The system introduces an intermediary mechanism where the power control application acts as a mediator between the network I/F and the OS. It notifies the first device of the return time based on packet reception speed and memory capacity, allowing the system to coordinate packet reception with CPU availability, preventing buffer overflow
4Extent of automation
If the OS determines C-state based on return time notified by PCIe devices using LTR, then power management is automated, but the mechanism cannot adapt to different power modes (standby vs. waiting response) in multifunction devices
Solution Approach 1:
The power control application serves multiple functions: it manages power modes (standby, waiting response), determines appropriate return times, and communicates with PCIe devices to adjust their LTR notifications. This single component handles both power mode management and return time coordination, making the system adaptable to different operational contexts while maintaining automated power management
Solution Approach 2:
The system implements feedback loops where the power control application continuously monitors the power mode and adjusts the return time notification to the first device accordingly. This feedback mechanism ensures that the LTR-based power management adapts to changing operational requirements
Data Source
AI summary
An information processing apparatus includes a processor and a first device. The processor executes an operating system and a power control application, which operates on the operating system and controls a power mode of the information processing apparatus. The first device is connected to the processor to communicate with the processor, and notifies the operating system of a return time. The power control application notifies the first device of information indicating the power mode of the information processing apparatus. Based on the information notified by the power control application, the first device determines a return time of which the operating system is to be notified, and notifies the operating system of the determined return time. Based on the return time notified by the first device, the operating system determines a power saving state to which the processor is to shift, and shifts the processor to the determined power saving state.