Processor Power Management via Execution Unit Switching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current processor technologies face challenges in efficiently managing power consumption and heat dissipation, particularly in mobile and embedded computing applications, where dynamic power reduction techniques are insufficient in minimizing overall power dissipation.

Innovation Solution

A processor with a power managing mechanism that includes power-on and power-off instructions, utilizing a pre-decoder to identify these instructions and a power controller to switch execution units on or off based on reservation table status, ensuring that execution units are only powered down when their tasks are completed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If execution units are kept active to maintain system performance, then processing speed is improved, but power consumption increases

Engineering Contradiction:
Improveprocessing speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The execution units are designed to dynamically switch between active and inactive states based on workload requirements. The power controller monitors instruction queues and activation signals to determine when to transition execution units between states, allowing the system to adapt power consumption to actual processing needs while maintaining performance when required.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs periodic polling of instruction queues and activation signals by the power controller to determine execution unit state transitions. This periodic monitoring enables the system to rhythmically switch execution units on and off based on accumulated instructions, creating a cadence of activity that balances performance with power savings.

Inventive Principle:
Principle #19Periodic action

2Use of energy by moving object

If execution units are turned off to reduce power consumption, then power consumption is reduced, but system responsiveness deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem responsiveness
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system performs preliminary actions by pre-fetching and queueing instructions before execution units are turned off. The instruction queue accumulates upcoming instructions, and the power controller predicts future workload based on this queued data, allowing execution units to be powered down during predictable idle periods while ensuring immediate availability when new instructions arrive.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The power controller continuously monitors feedback from instruction queues, activation signals, and execution unit status to make real-time decisions about power state transitions. This feedback mechanism ensures that execution units are kept active when instructions are pending and can be safely powered down when queues are empty, maintaining system responsiveness while optimizing power consumption.

Inventive Principle:
Principle #23Feedback

3Use of energy by moving object

If clock signals are stopped to save power, then power consumption is reduced, but instruction execution is delayed

Engineering Contradiction:
Improvepower consumptionVSAvoidinstruction execution delay
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The system segments the processor into multiple execution units that can be independently controlled. Instead of stopping clock signals to the entire processor, the power controller selectively manages power to individual execution units based on their specific workload, allowing other units to continue processing without delay while reducing overall power consumption.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7398410B2Processor employing a power managing mechanism and method of saving power for the same
Publication Date: 2008.07.08 NATIONAL TSING HUA UNIVERSITY
  • US7398410B2 patent drawing
  • US7398410B2 patent drawing
  • US7398410B2 patent drawing

AI summary

A processor includes a plurality of execution units configured to execute instructions, a pre-decoder configured to sieve out a power-switching instruction from the instructions, and a power controller configured to control the status of the execution unit based on the power-switching instruction. The power controller includes an identification decoder configured to generate identifications respectively corresponding to the execution units from the power-switching instruction, and a power manager configured to switch the execution unit corresponding to the identification. Particularly, the power-switching instruction includes a power-on instruction and a power-off instruction. The processor further includes a plurality of reservation tables each configured to store the instruction to be executed by one of the execution units, and a turn-off signal is not conveyed to the power manager until the reservation table corresponding to the execution unit to be turned off is empty.