Processor Resource Allocation via Power Table for Asymmetric Cores

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Solution Overview

Problem

Conventional processor control methods for electronic devices, particularly in non-SMP systems, face challenges in efficiently managing asymmetric CPU cores, leading to delayed responses and unnecessary power consumption due to inadequate hot-plugging and dynamic voltage and frequency scaling strategies.

Innovation Solution

A method for processor resource allocation that involves obtaining task-related information to selectively utilize specific processor cores and determine minimum core counts and frequencies based on application requirements, using a power table and system loading to optimize performance and energy efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If conventional hot-plugging and DVFS methods are used in non-SMP systems, then system flexibility and power efficiency are improved, but response time increases and performance optimization deteriorates due to delayed detection and inadequate task-core matching

Engineering Contradiction:
Improvepower consumptionVSAvoidresponse time
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

The patent implements preliminary action by continuously monitoring task characteristics and system state in advance, maintaining a power table with pre-calculated optimal processor configurations. When a task arrives, the system can immediately retrieve and apply the pre-determined optimal configuration from the power table, eliminating the need for time-consuming runtime analysis and achieving both energy efficiency and fast response.

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If asymmetric CPU cores are used to balance performance and power efficiency, then power consumption is reduced, but task scheduling complexity increases due to the need to match specific task requirements with appropriate core capabilities

Engineering Contradiction:
Improvepower consumptionVSAvoidtask scheduling complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent applies self-service by enabling tasks to effectively select their own optimal processor core through the power table mechanism. The system pre-analyzes and stores the relationship between task characteristics and optimal core assignments in the power table. During runtime, the task simply needs to provide its characteristic parameters, and the system automatically retrieves the pre-determined optimal core assignment, making the complex scheduling decision process transparent and self-service oriented.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent implements preliminary action by pre-calculating and storing optimal task-core mappings in the power table based on task characteristics. This eliminates the need for complex runtime scheduling decisions, as the optimal assignment is determined in advance and stored for rapid retrieval during task execution.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If runtime analysis of task characteristics is performed to optimize processor selection, then performance optimization is improved, but system response time deteriorates due to the time required for analysis and decision making

Engineering Contradiction:
Improveperformance optimizationVSAvoidsystem response time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent resolves this contradiction by performing the performance optimization analysis in advance and storing the results in the power table. During runtime, the system only needs to query the pre-computed results based on task characteristics, achieving both optimal performance selection and fast response time without the overhead of runtime analysis.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10055259B2Method for performing processor resource allocation in an electronic device, and associated apparatus
Publication Date: 2018.08.21 MEDIATEK INC
  • US10055259B2 patent drawing
  • US10055259B2 patent drawing
  • US10055259B2 patent drawing

AI summary

A method for performing processor resource allocation in an electronic device is provided, where the method may include the steps of: obtaining task-related information to determine whether a task of a plurality of tasks is a heavy task (e.g. the heavy task may correspond to heavier loading than others of the plurality of tasks), to selectively utilize a specific processor core within a plurality of processor cores to perform the task, and determining whether at least one scenario task exists within others of the plurality of tasks, to selectively determine according to application requirements a minimum processor core count and a minimum operating frequency for performing the at least one scenario task; and performing processor resource allocation according to a power table and system loading, to perform any remaining portion of the plurality of tasks. An apparatus for performing processor resource allocation according to the above method is provided.