Processor Power Throttling With Closed-Loop Power Control
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Solution Overview
Problem
Complex computing systems face challenges in managing power consumption, leading to performance loss due to safety factors and inefficiencies in power management, particularly in datacenters and other computing environments.
Innovation Solution
A closed loop throttling mechanism is implemented, using sensors to monitor power consumption and activate internal throttling engines in processors to adjust performance levels based on predefined thresholds, allowing for dynamic power management and reducing performance loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power management safety factors are implemented to prevent power excursions, then system reliability is improved, but performance is reduced due to throttling and inefficiencies
Solution Approach 1:
The patent implements a closed-loop feedback mechanism where sensors continuously monitor power consumption and provide real-time data to control logic. The control logic compares actual power consumption against thresholds and dynamically adjusts processor throttling states accordingly. This feedback system enables the processor to maintain optimal performance while reliably preventing power excursions, resolving the contradiction between reliability and performance by making power management adaptive rather than statically conservative
Solution Approach 2:
The patent introduces dynamic power management through multiple throttling states (e.g., C-states, P-states) that can be transitioned between based on real-time power conditions. Rather than using fixed safety factors that permanently limit performance, the system dynamically adjusts performance levels in response to power availability, workload demands, and thermal conditions. This dynamic approach allows the system to achieve high performance when power is abundant while maintaining reliability when power is constrained
2Productivity
If integrated circuit density is increased to improve computing capability, then processing power is improved, but power consumption increases
Solution Approach 1:
The patent divides the integrated circuit into multiple independent power domains, each with its own power management controls and throttling mechanisms. This segmentation allows different regions of the processor to be independently managed based on their specific power consumption characteristics and workload requirements. By segmenting the system into manageable power domains, the patent enables fine-grained power control that maintains high computing capability in active regions while reducing overall power consumption through selective throttling of less critical regions
Solution Approach 2:
The patent employs dynamic parameter changes including voltage scaling, frequency adjustment, and throttling state transitions to optimize the power-to-performance ratio. By continuously monitoring power consumption and workload demands, the system adjusts operational parameters such as voltage and frequency to match actual needs, preventing both over-provisioning (waste) and under-provisioning (performance loss). This parameter optimization enables high-density circuits to achieve their computing potential while consuming minimal power
Data Source
AI summary
A system includes multiple processors and a power controller. Each processor includes a throttling engine. The power controller is to, in response to a determination that a first power consumption level exceeds a first threshold, assert a critical signal to each throttling engine of the plurality of processors. Further, for each processor, the throttling engine of the processor is to perform a sequence of multiple throttling states while the critical signal is asserted by the power controller, where the sequence of multiple throttling states is performed according to a state machine of the throttling engine. Other embodiments are described and claimed.