Processor Power Throttling and Voltage Drift Compensation
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Solution Overview
Problem
Modern processor power systems face challenges in managing power consumption and voltage regulation, as real-world workloads can exceed predetermined limits, leading to potential overheating and increased system costs due to the need for more power or reduced processor yield, and component values drift over time, affecting voltage supply accuracy.
Innovation Solution
A power system that includes a power controller to dynamically throttle processor cores and adjust output voltage based on actual consumption and temperature, using sensors and A/D converters to monitor and adjust power and voltage in real-time, ensuring the processor operates within predetermined thresholds and maintaining accurate voltage supply.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an artificial maximum power workload limit is employed to prevent exceeding power limits, then processor reliability is improved, but processor yield decreases and system cost increases
Solution Approach 1:
The patent implements dynamic power management by continuously monitoring actual processor power consumption and adjusting the power limit threshold in real-time based on measured conditions, allowing the system to adapt to varying workload characteristics and environmental factors rather than using a static artificial limit
Solution Approach 2:
The system employs feedback mechanisms where power consumption is measured by sensors, compared against thresholds, and used to dynamically adjust power delivery through the voltage regulator module, creating a closed-loop control system that maintains reliability without requiring conservative static limits
2Reliability
If an artificial maximum power workload limit is employed to prevent exceeding power limits, then processor reliability is improved, but system cost increases due to requiring more power or reduced yield
Solution Approach 1:
The system dynamically adjusts power delivery based on real-time measurements of actual processor power consumption, allowing the VRM to supply exactly the power needed rather than provisioning for worst-case scenarios, thereby reducing overall system power cost while maintaining reliability
Solution Approach 2:
The patent changes the power limit parameter dynamically based on measured conditions including actual power consumption, temperature, and workload characteristics, allowing the system to operate efficiently across different conditions without requiring excessive power provisioning
3Ease of manufacture
If a fixed VID value is used to control VRM output voltage, then ease of manufacture is improved, but voltage supply accuracy deteriorates over time due to component drift
Solution Approach 1:
The system implements feedback control where the actual output voltage from the VRM is measured and compared against the expected voltage, and the VID register is dynamically adjusted based on the detected difference to compensate for component drift over time
Solution Approach 2:
The power system performs self-calibration by automatically detecting voltage deviations and adjusting the VID register accordingly, enabling the system to correct its own drift without external intervention or manual recalibration
4Temperature
If thermal throttling is used to reduce processor temperature, then temperature control is improved, but processor productivity decreases
Solution Approach 1:
The system dynamically adjusts power delivery and processor operation based on real-time temperature measurements and power consumption data, allowing for fine-grained control that maintains temperature within safe limits while maximizing processor productivity by avoiding excessive throttling
Data Source
AI summary
A power system couples to a multi-core processor to provide power to the processor. The power system throttles at least one of the cores of the processor when the power that the processor consumes from the power system exceeds a predetermined threshold power. The power system may reduce the rate of instruction issue by a particular core or clock gate a particular core to provide power throttling. The power system dynamically responds to variance of the actual output voltage that processor circuitry receives from the power system in comparison to an expected output voltage over time and corrects for such variance.