Processor Reset Signal Verification for Functional Safety

The patent implements a feedback mechanism where the processor detects the status of the power-on reset signal by monitoring whether specific register values have been properly initialized. The software checks if predetermined values are stored in predetermined registers, providing feedback about the reset signal's normal operation. This allows the system to detect reset failures without adding complex external detection circuitry.

The system uses its own internal resources (processor, registers, and software) to detect the status of the reset signal. Instead of requiring external detection equipment or additional dedicated detection circuits, the processor performs self-diagnosis by checking whether its internal registers contain expected values after reset, thereby enabling the system to monitor its own reset functionality.

The patent makes the processor serve multiple functions: it not only executes normal processing tasks but also performs detection of the reset signal status. By utilizing the processor's existing capabilities for both operation and self-diagnosis, the invention avoids adding dedicated detection hardware, thereby maintaining device simplicity while ensuring functional safety through multi-functional use of the processor.

The patent uses predetermined register values as an intermediary indicator to reflect the status of the reset signal. Instead of directly monitoring the reset signal line, the system checks whether these intermediary register values have been properly set, which indirectly indicates whether the reset signal operated normally. This intermediary approach simplifies the detection mechanism while maintaining reliability.