Processor Scheduling Based on Die Plan Thermal Zones

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Solution Overview

Problem

Thermal issues pose a significant challenge in computer hardware, as processors and graphics cards generate increasing heat, leading to reduced performance and hardware failures if not effectively managed.

Innovation Solution

A method for process scheduling that selects a first processing unit based on a use case associated with the thread and the locations of processing units within an electronic device, allocating the thread to be processed on the unit that is farther away from heat sources such as GPUs or ISPs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If threads are assigned to processing units based solely on use case and availability, then scheduling simplicity is maintained, but thermal management effectiveness deteriorates

Engineering Contradiction:
Improvescheduling simplicityVSAvoidthermal management effectiveness
Core Design Contradiction:
Ease of operationVSTemperature

Solution Approach 1:

The system performs preliminary actions by pre-calculating thermal zones and pre-assigning processing units to threads based on their locations before thermal issues arise. The scheduler uses die plan information to predict thermal interactions and proactively assigns threads to cooler regions, preventing thermal buildup rather than reacting to it.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention applies local quality by differentiating treatment based on spatial location. Processing units are not treated uniformly but are assigned different roles based on their thermal zones. Threads are selectively assigned to specific processing units based on their thermal characteristics and locations, creating localized optimization strategies.

Inventive Principle:
Principle #3Local quality

2Productivity

If processing units are located closer together to increase density, then device integration is improved, but thermal interference between units worsens

Engineering Contradiction:
Improvedevice integration densityVSAvoidthermal interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The system converts the harmful thermal interference into a beneficial scheduling constraint. By using die plan information to identify thermal zones, the scheduler leverages thermal characteristics to make intelligent thread-to-processing-unit assignments. The thermal interference that would normally be problematic becomes a guiding factor for optimizing thread placement.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The invention adds a thermal dimension to the traditional scheduling decisions. Instead of only considering processing unit availability and use case matching, the system incorporates spatial and thermal zone information as an additional dimension for scheduling, creating a multi-factor optimization approach.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If threads are assigned to processing units without considering spatial location, then scheduling complexity is reduced, but performance degradation due to thermal issues increases

Engineering Contradiction:
Improvescheduling complexityVSAvoidcomputing efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The scheduler is enhanced to perform multiple functions simultaneously: it matches threads to processing units based on use case, considers spatial location, and accounts for thermal zones. This multi-functional scheduler handles diverse scheduling criteria in a unified approach, improving computing efficiency without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system uses die plan information as a template or copy of the physical layout to make scheduling decisions. By copying the spatial and thermal characteristics from the die plan, the scheduler can simulate thermal interactions and make informed assignments without requiring complex real-time thermal modeling.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20250117250A1Processor unit scheduling based on die plan in multi-cluster architectures
Publication Date: 2025.04.10 QUALCOMM INC
  • US20250117250A1 patent drawing
  • US20250117250A1 patent drawing
  • US20250117250A1 patent drawing

AI summary

Certain aspects of the present disclosure are directed towards a method for process scheduling. The method generally includes selecting a first processing unit of a plurality of processing units to process a thread based on a use case associated with the thread and locations of the plurality of processing units within an electronic device, and allocating the thread to be processed on the first processing unit.