Application Processor Data Encryption with Shared Keys

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing data processing systems face challenges in protecting information from external physical attacks, with on-chip memory solutions increasing manufacturing costs and processor-based encryption leading to overload and reduced memory efficiency.

Innovation Solution

A data processing system where an application processor encrypts and decrypts data using a shared encryption key and initialization vector with a memory device, which also generates and verifies message authentication codes to ensure data integrity and security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is encrypted using a processor, then data security is improved, but processor overload occurs

Engineering Contradiction:

Improvedata securityVSAvoidprocessor performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The encryption function is segmented from the processor and assigned to a dedicated encryption device. This separation allows the processor to focus on general computing tasks while the encryption device handles security operations, resolving the processor overload problem while maintaining data security.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

An encryption device acts as an intermediary between the processor and external memory. This intermediary handles all encryption and decryption operations, preventing the processor from being overloaded while ensuring data security during transmission and storage.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If encrypted data is stored in external memory, then data security is improved, but memory space efficiency decreases

Engineering Contradiction:

Improvedata securityVSAvoidmemory space efficiency

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The system changes the encryption approach by using symmetric encryption with shared keys between the encryption device and memory device. This allows encrypted data to be stored efficiently in external memory while maintaining security, as the encryption overhead is minimized through dedicated hardware implementation.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If block encryption is used by the processor, then data security is improved, but processing delay and power consumption increase

Engineering Contradiction:

Improvedata securityVSAvoidprocessing delay

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent replaces the software-based block encryption mechanism in the processor with a dedicated hardware encryption device. This hardware implementation performs encryption operations in parallel and with higher efficiency, significantly reducing processing delay and power consumption while maintaining strong data security through symmetric encryption algorithms.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9977749B2Application processor and data processing system including the same

Publication Date: 2018.05.22 SAMSUNG ELECTRONICS CO LTD

AI summary

A data processing system includes an application processor, a memory device, and a channel connecting the application processor and the memory device. The application processor encrypts first data using a first encryption key and a first initialization vector in response to a write command, and transmits first encrypted data to the memory device through the channel. The memory device decrypts the first encrypted data using a second encryption key and a second initialization vector, and stores first decrypted data in a memory core. The second encryption key and the second initialization vector are stored in the memory device. The first encryption key is the same as the second encryption key, and the first initialization vector is the same as the second initialization vector.