Processor SHIELD Instruction for Side Channel Attack Protection
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Solution Overview
Problem
Current methods for protecting information processing systems against side channel attacks often increase power consumption and decrease performance, and existing techniques may not provide sufficient customizable protection levels, especially in scenarios where optimization of code increases susceptibility to such attacks.
Innovation Solution
The implementation of a custom protection mechanism within processors, utilizing a SHIELD instruction to dynamically enable or disable specific hardware features like binary translation, branch prediction, and cache usage, allowing for varying levels of side channel protection based on operational needs, thereby optimizing protection and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing protection techniques are applied to defend against side channel attacks, then security is improved, but power consumption increases and performance decreases
Solution Approach 1:
The patent implements dynamic protection by introducing a SHIELD instruction that allows runtime switching between protected and unprotected execution modes. The processor can dynamically adjust the level of protection based on the specific code sequence being executed, enabling high-security modes for critical cryptographic operations and high-performance modes for non-sensitive code, thus optimizing the trade-off between security and power consumption on demand
Solution Approach 2:
The patent applies protection selectively to specific code sequences rather than uniformly across all code. By using the SHIELD instruction to mark particular code regions that require protection against side channel attacks, the system applies security measures only where needed, leaving other code to execute with full performance and without additional power consumption overhead
2Reliability
If existing protection techniques are applied to defend against side channel attacks, then security is improved, but performance decreases
Solution Approach 1:
The SHIELD instruction enables dynamic adjustment of protection levels during runtime. Critical cryptographic code sequences can be executed with full side channel protection, while non-sensitive code executes in unprotected high-performance mode, allowing the system to maintain high overall performance while providing security where required
Solution Approach 2:
Protection is applied locally to specific marked code sequences rather than globally. The processor identifies and applies protection measures only to the code regions designated by SHIELD instructions, allowing the majority of code to execute at full speed without security overhead, thus maintaining high performance while providing targeted security
3Productivity
If code is optimized for performance, then productivity is improved, but susceptibility to side channel attacks increases
Solution Approach 1:
The SHIELD instruction provides preliminary protection by marking code sequences before execution. When the processor encounters a SHIELD instruction, it activates protection measures for the subsequent marked code sequence, preventing side channel attacks in advance while allowing the code to be optimized for performance without compromising security
Data Source
AI summary
Embodiments of an invention for custom protection against side channel attacks are disclosed. In one embodiment, a processor includes instruction hardware and execution hardware. The instruction hardware is to receive an instruction to provide for shielding code against side channel attacks, wherein the instruction includes a first operand to specify one of a plurality of levels of protection. The execution hardware is to execute the instruction, wherein execution of the instruction includes configuring the processor to provide a specified level of protection.