Processor Shuffling Logic for Parallel Random Permutation Generation

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Solution Overview

Problem

Existing methods for generating random permutations, such as the Fisher-Yates shuffle, are unsuitable for parallel processing and require significant storage space, making them inefficient for security technologies like post-quantum cryptography that need to defend against side-channel analysis attacks.

Innovation Solution

A processor with a controller, shuffling logic, and operation logic that performs modular addition and rotation shift operations on index numbers to generate random permutations, enabling parallel processing and reducing storage requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If Fisher-Yates shuffle is used to generate random permutations, then the permutation generation can be performed with simple logic, but the storage space requirement becomes significantly large and parallel processing becomes difficult

Engineering Contradiction:
Improvepermutation generation logic simplicityVSAvoidstorage space requirement
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The patent divides the permutation generation process into multiple independent parallel processing units, each handling a subset of elements. This segmentation allows the system to generate random permutations using minimal storage space while maintaining parallel processing capability, directly resolving the contradiction between storage requirements and operational simplicity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential Fisher-Yates shuffling to a parallel dimension by simultaneously processing multiple elements across different processing units. This dimensional change enables the system to achieve both simple logic and low storage requirements through distributed computation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If Fisher-Yates shuffle is used to generate random permutations, then the permutation can be generated sequentially, but parallel processing capability is lost

Engineering Contradiction:
Improvepermutation generation speedVSAvoidparallel processing capability
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent segments the permutation generation task across multiple independent processing units that can operate simultaneously. Each unit processes a subset of elements independently, enabling parallel processing while maintaining high generation speed, thus resolving the contradiction between productivity and parallel capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges the results from multiple parallel processing units to produce the final random permutation. This combining approach maintains both high productivity through parallel processing and operational simplicity through a unified output structure.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If large storage space is used for Fisher-Yates shuffle, then the permutation generation can be performed, but the efficiency for security technologies is reduced

Engineering Contradiction:
Improvesecurity against side-channel analysisVSAvoidstorage space consumption
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the storage requirements across multiple small, distributed memory structures in parallel processing units. This segmentation enables the system to achieve the necessary complexity for security against side-channel analysis while consuming minimal total storage space, resolving the contradiction between security reliability and storage consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter of storage organization from a single large storage structure to multiple small structures. This parameter change maintains the security requirements through distributed complexity while significantly reducing overall storage space consumption.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250013433A1Method and device for generating random permutations, and processor including random permutation generating logic circuit
Publication Date: 2025.01.09 SAMSUNG ELECTRONICS CO LTD
  • US20250013433A1 patent drawing
  • US20250013433A1 patent drawing
  • US20250013433A1 patent drawing

AI summary

A processor includes a controller configured to respectively assign different index numbers to a plurality of operations, a shuffling logic configured to perform a bitwise operation based on a modular addition operation and a rotation shift operation on each of the index numbers and to shuffle the index numbers, and an operation logic configured to perform the plurality of operations based on the shuffled index numbers.