Processor Signature Verification for Active Attack Protection

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Solution Overview

Problem

Current methods for protecting processor execution against active attacks lack effective mechanisms to detect and prevent unauthorized or unforeseen execution steps, which can lead to security breaches.

Innovation Solution

A method that determines actual and desired signature values for each execution step of a processor's instruction sequence, comparing them to ensure authorized execution, and omits or interrupts execution if they do not match, using signature operations like ISSA, ISSW, ISSI, ISSC, and ISSD to manage and update these values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If signature verification is performed at each execution step, then security against active attacks is improved, but processing time and execution speed deteriorate

Engineering Contradiction:
ImprovesecurityVSAvoidexecution speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent pre-calculates and stores desired signature values for sequences of execution steps before actual execution. During runtime, the processor retrieves pre-computed signature values and compares them with actual signature values, eliminating the need for complex real-time verification calculations and reducing execution overhead.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent divides the verification process into discrete comparison points at specific execution steps rather than continuous verification. By segmenting the instruction stream into blocks with verification checkpoints, the system achieves security without requiring verification at every single cycle, thus maintaining execution speed.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If additional verification steps are inserted into the execution sequence, then detection precision of unauthorized execution is improved, but device complexity increases

Engineering Contradiction:
Improvedetection precisionVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The processor utilizes its existing computational resources and execution pipeline to perform signature verification operations. The verification mechanism leverages the processor's own arithmetic units and register files to compute and compare signature values, eliminating the need for separate dedicated verification hardware and reducing overall device complexity.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The signature verification mechanism is designed to work with the processor's existing instruction pipeline and execution architecture. The same execution units that run normal instructions are also used for signature computation and verification, making the verification system multi-functional and avoiding additional dedicated hardware components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If signature values are computed and compared at every execution step, then reliability against active attacks is improved, but loss of time in processing increases

Engineering Contradiction:
Improveprotection reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent pre-calculates and stores desired signature values for sequences of execution steps before actual execution. During runtime, the processor retrieves pre-computed signature values and compares them with actual signature values, eliminating the need for complex real-time verification calculations and reducing execution overhead.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The verification is performed periodically at specific execution steps rather than continuously at every single cycle. The patent implements verification at designated checkpoints in the instruction stream, balancing security requirements with processing efficiency by avoiding constant verification while maintaining adequate protection intervals.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9003198B2Method and apparatus for data processing
Publication Date: 2015.04.07 INFINEON TECHNOLOGIES AG
  • US9003198B2 patent drawing
  • US9003198B2 patent drawing
  • US9003198B2 patent drawing

AI summary

A method for processing an operating sequence of instructions of a program in a processor, wherein each instruction is represented by an assigned instruction code which comprises one execution step to be processed by the processor or a plurality of execution steps to be processed successively by the processor, includes determining an actual signature value assigned to a current execution step of the execution steps of the instruction code representing the instruction of the operating sequence; determining, in a manner dependent on an address value, a desired signature value assigned to the current execution step; and if the actual signature value does not correspond to the desired signature value, omitting at least one execution step directly available for execution and/or an execution step indirectly available for execution.