Processor Skip Flag for Conditional Instruction Sequences
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Solution Overview
Problem
Data-dependent branches in vector processing are difficult to predict, leading to misprediction and costly state rollback, especially when dealing with large vector data elements, which hinders performance and efficiency.
Innovation Solution
The approach involves recognizing patterns of conditionally executed instructions that do not change the state if the condition is not met, allowing for early skipping of these instructions without state restoration, using a skip flag and target location to update the program counter if the condition is not fulfilled, thereby avoiding unnecessary execution and rollback.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a branch instruction is used to skip conditional instructions when the mask is zero, then the execution time is reduced for zero masks, but branch misprediction causes costly state rollback and reduces reliability
Solution Approach 1:
The patent performs preliminary action by checking the mask value before executing conditional instructions. The processor detects whether the mask is zero in advance and prepares to skip the instruction sequence without taking a branch, thereby avoiding misprediction penalties while still achieving time savings when the mask is zero.
Solution Approach 2:
The patent implements skipping by enabling the processor to rush through or bypass a sequence of conditional instructions when the mask is determined to be zero. This is achieved through a skip mechanism that updates the program counter to jump over the instruction sequence, eliminating execution time waste without relying on branch prediction.
2Reliability
If state restoration is performed upon branch misprediction, then correct execution is restored, but the area required to save machine state increases due to large vector data elements
Solution Approach 1:
The patent extracts or removes the need for state restoration by avoiding branches entirely. Instead of saving and restoring machine state upon misprediction, the processor uses a mask-checking mechanism that determines beforehand whether conditional instructions should execute, thereby eliminating the harmful state storage requirement while maintaining execution correctness.
Solution Approach 2:
The patent applies preliminary action by checking the mask value before instruction execution and determining in advance whether skipping is necessary. This preliminary determination eliminates the need for subsequent state restoration, as the processor never enters a mispredicted state in the first place.
3Productivity
If conditional instructions are executed before the condition is determined, then throughput is improved, but unnecessary execution occurs when the condition is not met
Solution Approach 1:
The patent implements skipping by enabling the processor to bypass unnecessary instruction execution when the mask is zero. After executing instructions speculatively to maintain throughput, the processor detects the zero mask condition and skips over subsequent conditional instructions, thereby eliminating wasted energy consumption while preserving high throughput.
Solution Approach 2:
The patent uses feedback by monitoring the mask value and using this information to control whether conditional instructions execute. The feedback mechanism allows the processor to adjust execution behavior dynamically, stopping unnecessary instruction execution when the mask indicates zero, thereby reducing power consumption while maintaining throughput when the mask is non-zero.
Data Source
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AI summary
A data processing apparatus is disclosed, having: an instruction decoder configured to decode a stream of instructions, a data processor configured to process the decoded stream of instructions; wherein in response to a plurality of adjacent instructions within the stream of instructions execution of which is dependent upon a data condition being met and whose execution when said data condition is not met does not change a state of said processing apparatus, the processor is configured to: commence determining whether the data condition is met or not; and commence processing said plurality of adjacent instructions; and in response to determining that said data condition is not met; skip to a next instruction to be executed after said plurality of adjacent instructions without executing any intermediate ones of said plurality of adjacent instructions not yet executed and continue execution at the next instruction.