Processor SMM Entry with Preconfigured Modes for Faster SMI Handling
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Solution Overview
Problem
The inefficiencies in entering system management mode (SMM) due to serial relocation of SMBase, mode switching during SMI handler execution, and undefined register values reduce the execution efficiency of the SMI handler.
Innovation Solution
A method that allows logical cores to enter target operating mode directly through hardware settings based on core configuration information, eliminating mode switching and customizing register settings, using model specific registers (MSRs) to determine state and configuration information addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If mode switching is performed when executing SMI handler, then the processor can operate in appropriate operating modes, but the execution efficiency of the SMI handler is reduced
Solution Approach 1:
The patent applies preliminary action by configuring the operating mode before the SMI handler execution begins. The processor enters the target operating mode in advance through hardware settings based on core configuration information, so that when the SMI handler executes, no mode switching is needed. This eliminates the time loss from mode switching while ensuring the processor operates in the correct mode throughout handler execution.
2Reliability
If serial relocation of SMBase is performed, then system management mode entry is achieved, but processing time is increased
Solution Approach 1:
The patent applies preliminary action by pre-configuring core configuration information including SMBase addresses during system initialization. This configuration is stored in hardware registers before SMI occurs, enabling the processor to directly access the correct system management data structures without performing serial relocation operations when entering SMM, thus reducing entry time while maintaining correctness.
3Device complexity
If register values are undefined upon entering SMM, then hardware state preservation is simplified, but additional setup operations are required reducing execution efficiency
Solution Approach 1:
The patent applies preliminary action by pre-configuring all necessary register values in the core configuration information before SMI occurs. The processor loads these pre-configured register values during SMM entry, eliminating the need for additional setup operations within the SMI handler. This maintains the simplicity of hardware state preservation while improving execution efficiency by removing redundant setup steps.
Data Source
AI summary
The present invention relates to a method for a processor and a computer system to enter system management mode (SMM). The method is applied to the processor, which includes at least one logical core. The method includes entering the SMM in response to a system management interrupt (SMI), storing current state information to a corresponding state save area; setting operation mode to target operating mode, and executing the SMI handler under the target operating mode. The address of the state save area, the address of the core configuration information memory space, and the address of the SMI handler can be determined directly. Each logical core may enter the target operating mode directly through hardware setting every time after entering the SMM, and thus does not need to perform a fixed operation of mode switching when executing the SMI handler, which may improve the execution efficiency of the SMI handler.