Processor Sparing via Recovery Buffer and Mapper State Transfer
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Solution Overview
Problem
In multi-core computer systems, the process of processor sparing and recovery is complex due to the architectural state being spread across multiple locations, making it difficult to mix recovery with sparing, especially when errors occur near completion without checkpointing, leading to potential failures in dynamically sparing a core.
Innovation Solution
The method involves transferring information from a recovery buffer to a mapper, including logical register mapping information, and performing a sparing operation using this information to restore the core to a previous state before deciding between recovery or sparing, allowing for simpler and more reliable handling of core failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the architectural state is spread across multiple locations (mapper and recovery buffer), then the processor can maintain more complete state information for recovery, but the sparing process becomes more complex and requires accessing multiple locations
Solution Approach 1:
The recovery buffer is pre-loaded with architectural state information during normal operation, so that when a fault occurs, the information is already available in a readily accessible location. This preliminary action eliminates the need for complex real-time gathering of state information from multiple locations during the sparing process.
Solution Approach 2:
The patent combines the recovery buffer functionality with the mapper structure, allowing the same data structure to serve both recovery operations and sparing operations. This merging eliminates the need to access separate locations for different operations, simplifying the overall process while maintaining complete state information.
2Adaptability or versatility
If recovery and sparing operations are mixed, then the system can handle both types of failures, but issues arise when errors occur near completion without checkpointing
Solution Approach 1:
The mapper serves as an intermediary structure that mediates between the recovery buffer and the sparing process. By using the mapper as the authoritative source for architectural state information, the system can reliably perform dynamic sparing operations even when errors occur near completion, as the mapper contains the consolidated state information needed for successful sparing.
Solution Approach 2:
The system uses the mapper as a feedback mechanism to continuously maintain accurate architectural state information. This feedback loop ensures that the mapper always contains the correct state information, enabling reliable sparing decisions and operations regardless of when failures occur in the execution cycle.
3Reliability
If the sparing process accesses both the mapper and recovery buffer, then complete state information can be obtained, but the process time increases
Solution Approach 1:
The recovery buffer is pre-populated with architectural state information during normal instruction execution, so that when a fault occurs, the information is already prepared and available. This eliminates the need for time-consuming real-time gathering of state information from multiple sources during the critical sparing response period.
Data Source
AI summary
In a multi-core computer system, a method for dealing with a fault with a core includes detecting a fault in one of the cores. Information is transferred from a recovery buffer to a mapper. The information includes logical register mapping information. A recovery is performed using the information in the mapper. If a recovery cannot proceed, a sparing can be initiated using the information in the mapper.