Processor Stack Management via Interrupt Blocking

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Solution Overview

Problem

Existing processor technologies face challenges in preventing stack overflow errors, particularly during the handling of nested or recursive interrupt requests, which can lead to system instability and crashes due to uncontrolled stack memory usage.

Innovation Solution

Implementing a system that monitors call stack usage levels and selectively disables or delays interrupts based on priority levels when the stack usage exceeds predefined thresholds, ensuring that the call stack does not overflow by temporarily blocking lower-priority interrupts until sufficient space is freed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If interrupts are serviced by the processor without restrictions, then system responsiveness and interrupt handling capability are improved, but stack overflow errors occur due to uncontrolled stack memory usage

Engineering Contradiction:
Improveinterrupt handling capabilityVSAvoidstack overflow prevention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system dynamically adjusts interrupt handling behavior based on real-time stack usage conditions. When stack usage exceeds a threshold, the system transitions from allowing all interrupts to selectively blocking interrupts, creating a dynamic response that prevents stack overflow while maintaining system responsiveness under normal conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system continuously monitors stack usage and uses this feedback to control interrupt handling. The monitoring mechanism provides real-time information about stack consumption, which triggers interrupt blocking when thresholds are exceeded, forming a closed-loop control system that prevents stack overflow

Inventive Principle:
Principle #23Feedback

2Reliability

If the call stack size is increased to accommodate more information items, then stack overflow prevention is improved, but memory usage increases

Engineering Contradiction:
Improvestack overflow preventionVSAvoidmemory usage
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The system establishes predetermined stack usage thresholds before overflow occurs. By monitoring and comparing current stack usage against these pre-set limits, the system takes preventive action (blocking interrupts) before the stack exceeds available memory, avoiding the need for excessive memory allocation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system changes the operational parameters of interrupt handling based on stack usage conditions. Instead of maintaining a fixed large stack size, the system adjusts interrupt acceptance behavior dynamically, changing from permissive to restrictive interrupt handling as stack usage increases

Inventive Principle:
Principle #35Parameter changes

3Productivity

If nested or recursive interrupt requests are allowed without restriction, then system responsiveness to multiple interrupts is improved, but stack memory consumption increases uncontrollably

Engineering Contradiction:
Improveinterrupt servicing efficiencyVSAvoidstack memory consumption
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The monitoring mechanism provides continuous feedback on stack usage levels caused by nested interrupts. When the feedback indicates excessive consumption, the system responds by blocking further interrupt nesting, preventing uncontrolled memory growth while allowing efficient interrupt handling within safe limits

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system applies preliminary countermeasures by blocking interrupts before stack overflow can occur. The monitoring and threshold comparison mechanism detects impending overflow conditions and preemptively prevents additional interrupt pushes that would cause uncontrolled memory consumption

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS10019395B2Processing system with stack management and method for stack management
Publication Date: 2018.07.10 NXP USA INC
  • US10019395B2 patent drawing
  • US10019395B2 patent drawing
  • US10019395B2 patent drawing

AI summary

The invention provides a processing system, comprising a memory comprising a processor call stack; a stack space usage register configured to determine the stack space usage of the processor call stack and to store a usage parameter indicative of the determined stack space usage; a first threshold register configured to store a pre-determinable first stack level threshold; and a first comparator configured to compare the usage parameter with the first stack level threshold and to output a first interrupt blocking signal, if the usage parameter exceeds the first stack level threshold, the first interrupt blocking signal being configured to block the decoding of interrupt signals input to the processing system and having interrupt priorities lower than or equal to or just lower than a first interrupt priority threshold. The invention further provides a method for stack management, especially in a processing system.