Secure Processor Startup via Debug Status Register
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Solution Overview
Problem
Existing processing devices lack the ability to debug startup code without compromising security, making it difficult to identify and address errors during the startup sequence, especially when errors occur without providing information to the user.
Innovation Solution
A method where a processor executes a startup code that checks the progress of the startup sequence, stores a status value in a non-volatile register accessible via a debug interface, and resets the device if an error is found, allowing external debugging based on this status value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If startup code executes without displaying information about execution progress for security reasons, then security is improved, but debugging capability deteriorates
Solution Approach 1:
The patent extracts the status information display function from the main startup code execution flow. A separate status register is introduced that can be independently accessed through the debug interface without affecting the security-critical startup verification process. This allows debugging information to be obtained without compromising security.
Solution Approach 2:
The patent introduces a status register as an intermediary between the startup code execution and the debug interface. This register acts as a mediator that captures execution status without exposing sensitive startup code details, enabling debugging while maintaining security boundaries.
2Reliability
If no information is displayed during startup code execution, then security is maintained, but error identification capability deteriorates
Solution Approach 1:
The patent segments the startup verification process into discrete steps, with each step's status captured in individual bits of the status register. This segmentation allows specific error locations to be identified without revealing information about the entire startup process, maintaining security while providing error diagnostics.
Solution Approach 2:
The patent uses bit value changes (0 or 1) in the status register to indicate the state of verification steps. These binary state changes serve as a simplified information display mechanism that provides error status without exposing detailed execution information, analogous to using color changes to indicate state.
3Reliability
If debugging interface access is restricted during startup code execution, then security is improved, but error analysis capability deteriorates
Solution Approach 1:
The patent provides partial access to the debug interface during startup execution - specifically, read-only access to the status register is granted while full debugging capabilities remain restricted. This partial action enables basic error status retrieval without compromising security by allowing comprehensive debugging.
4Reliability
If startup code executes in a closed processor state, then security is improved, but information accessibility deteriorates
Solution Approach 1:
The patent performs preliminary action by pre-allocating and initializing the status register before startup code execution begins. This allows the register to be ready to capture status information from the outset, enabling information retrieval during the closed-state execution without requiring the processor to transition to an open state.
Data Source
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AI summary
This description relates to a method comprising the execution, by a processor (104) of a processing device (100), of a startup code in order to carry out a startup sequence of the processing device, the execution comprising: - at least one step of verifying the correct execution of the startup sequence; and - if the at least one verification step identifies an error in the execution of the startup sequence, the storage of a status value in a register (114) of the processing device and the reset of the processing device, the register (114) being accessible for reading via a debugging interface (112) of the device.