Processor State Checksum Access for Hardware Fault Diagnostics

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Solution Overview

Problem

Conventional diagnostic methods struggle to effectively probe and cover hard-to-reach internal state elements in data processing apparatuses, leading to increased complexity, latency, and memory overhead in software test libraries, especially in safety-critical applications where hardware faults need to be detected.

Innovation Solution

Incorporating checksum generating circuitry that receives internal state from control storage elements and generates a checksum, which is stored in a diagnostic storage location accessible by a diagnostic control agent, allowing for efficient error checking and increased diagnostic coverage without significant additional circuit overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional diagnostic methods are used to probe internal state elements, then diagnostic coverage is limited, but software test library complexity and size increase

Engineering Contradiction:
Improvediagnostic coverageVSAvoidsoftware test library complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a checksum generator as an intermediary component that computes checksums of internal state elements and stores them in accessible storage locations. This mediator enables diagnostic agents to verify internal state without directly probing complex hard-to-reach elements, thereby improving diagnostic coverage while keeping test libraries simple.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a simplified copy of the internal state verification process by generating checksums that represent the state of control storage elements. Instead of directly accessing and verifying complex internal state, the diagnostic agent verifies the checksum copy, which is much simpler and more accessible.

Inventive Principle:
Principle #26Copying

2Reliability

If software test libraries are extended to cover hard-to-reach internal state, then diagnostic coverage improves, but testing latency increases

Engineering Contradiction:
Improvediagnostic coverageVSAvoidtesting latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The checksum generator continuously or periodically computes and updates checksums of internal state elements in advance, storing them in accessible locations. When diagnostic testing is needed, the verification can immediately compare current state against pre-computed checksums without performing complex probing operations, thus reducing testing latency.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If direct probing of internal state is implemented, then measurement precision improves, but device complexity increases

Engineering Contradiction:
Improveinternal state visibilityVSAvoidcircuit overhead
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the verification function from the complex internal state elements and implements it separately in the checksum generator. The checksum generator takes out the essential verification capability and provides it through a simple, accessible interface, maintaining measurement precision while avoiding the complexity of direct internal state probing.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11625316B2Checksum generation
Publication Date: 2023.04.11 ARM LTD
  • US11625316B2 patent drawing
  • US11625316B2 patent drawing
  • US11625316B2 patent drawing

AI summary

An apparatus has processing circuitry to perform data processing in response to instructions; at least one control storage element to store internal state for controlling operation of the processing circuitry; and checksum generating circuitry to generate a checksum based on at least one item of internal state stored in the at least one control storage element. The checksum is stored in a diagnostic storage location from which information is accessible to a diagnostic control agent (e.g. software executing on the processing circuitry and/or an external device). This makes design of software test libraries for detecting hardware faults much more efficient.