Processor Status Data Retention During Power Interruption
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Solution Overview
Problem
Existing semiconductor devices lack the capability to retain status data of a processor immediately before power interruption, which is crucial for analyzing malfunctions or damages.
Innovation Solution
A semiconductor device and system that includes a status data signal generating unit to convert processor status values into status data signals, which are transmitted and stored along with power control signals to a PMIC, allowing for the retention and storage of status data before power interruption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power is interrupted to protect the processor from malfunction or damage, then processor safety is improved, but status data is lost
Solution Approach 1:
The patent applies preliminary action by transmitting the status data signal to the PMIC before the power control signal interrupts power supply. The PMIC stores this data in advance in its internal register, ensuring that status information is preserved before the processor is powered off for safety reasons.
Solution Approach 2:
The PMIC acts as an intermediary between the processor and the external environment. It receives both the status data signal and power control signal from the processor, stores the status data in its internal register, and can later retrieve this data for analysis without requiring the processor to remain powered on.
2Loss of information
If status data is transmitted to PMIC before power interruption, then data retention is improved, but device complexity increases
Solution Approach 1:
The patent applies multi-functionality by utilizing existing PMIC components for multiple purposes. The PMIC's internal register, originally designed for other functions, is used to store status data. The existing power control signal line is also used to transmit the status data signal, eliminating the need for separate dedicated transmission channels.
Data Source
AI summary
A semiconductor device includes a status data signal generating unit receiving a status value of a processor and converting the status value into a status data signal, and a power control signal generating unit generating a power control signal for controlling power supplied from a power management integrated circuit (PMIC), the PMIC supplying power to the processor from outside of processor. The power control signal includes a power off signal for interrupting the power supplied from the PMIC and the status data signal is transmitted to the PMIC together with the power off signal.