Processor Thread Self-Scheduling With Pipeline Threshold Rescheduling
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Solution Overview
Problem
The complexity of scheduling threads in a processor with resources like memory registers can lead to increased circuit complexity and die area due to the need for hazard tracking, which is inefficient and costly.
Innovation Solution
Implementing thread self-scheduling by using thread identifiers (IDs) that follow instructions, allowing only hazard-free threads to be enqueued in a ready-to-run queue, and rescheduling based on response completion, eliminating the need for complex schedulers and record keeping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional thread scheduling with hazard tracking is implemented, then thread execution control is achieved, but circuit complexity and die area increase
Solution Approach 1:
The patent extracts the hazard tracking function from the traditional scheduler and implements it through a dedicated hazard tracking unit that operates independently. This separates the scheduling control logic from the thread management logic, allowing each to be optimized independently and reducing overall circuit complexity while maintaining reliable thread execution control
Solution Approach 2:
The scheduling system is segmented into distinct functional units: a hazard tracking unit that monitors resource availability, a scheduler that manages thread queues, and execution units that process instructions. This segmentation allows parallel operation of these units and reduces the complexity of any single unit while maintaining overall system reliability
2Reliability
If traditional thread scheduling with hazard tracking is implemented, then thread execution control is achieved, but die area increases
Solution Approach 1:
The patent merges the hazard tracking functionality with the existing resource allocation structures by having the hazard tracking unit share data paths and control signals with the scheduler and execution units. This integration eliminates redundant circuitry and reduces die area while maintaining reliable thread execution control through coordinated operation of the merged components
Solution Approach 2:
The hazard tracking unit is designed to universally monitor multiple resource types (registers, memory ports, functional units) through a unified interface and data structure. This multi-functionality allows a single compact unit to track hazards across all resources, reducing the need for separate tracking circuits for each resource type and thereby reducing overall die area
3Measurement precision
If complex schedulers and record keeping are used, then thread scheduling accuracy is improved, but circuit complexity increases
Solution Approach 1:
The patent implements feedback mechanisms where the hazard tracking unit continuously monitors resource status and provides real-time information to the scheduler. This feedback loop enables the scheduler to make accurate scheduling decisions based on current system state without requiring complex predictive algorithms or extensive record-keeping, thereby maintaining scheduling accuracy while reducing circuit complexity
Solution Approach 2:
The system performs preliminary hazard detection and thread readiness evaluation before threads are scheduled for execution. By pre-evaluating thread readiness and detecting potential hazards in advance, the scheduler can make accurate decisions with simpler logic, as the complex analysis is performed beforehand rather than during the scheduling decision process
Data Source
AI summary
To enable threads to self-schedule in a processor, when it is determined that an instruction will not complete within a threshold prior to insertion into a pipeline of the processor, a thread identifier (ID) can be passed with the instruction. Here, the thread ID corresponds to a thread of the instruction. When a response to completion of the instruction is received that includes the thread ID, the thread is rescheduled using the thread ID in the response.


