Processor Throttling for Speculation Control Memory Conflicts

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Solution Overview

Problem

The increasing number of CPU cores and shared memory access in modern computing systems leads to performance bottlenecks due to conflicts and inefficiencies in synchronization mechanisms, particularly when speculation control is enabled, resulting in sub-linear scaling and increased latency.

Innovation Solution

Throttling execution in a processor by determining if a transaction is in throttling mode and dynamically prefetching memory operands, ensuring memory instructions are executed in-program-order, thereby reducing conflicts and improving memory performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If out-of-program-order execution is used to improve processor throughput, then productivity increases, but memory conflicts and throttling occur when speculation control is enabled

Engineering Contradiction:

Improveprocessor throughputVSAvoidmemory access correctness

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The processor dynamically switches between out-of-program-order and in-program-order execution modes based on speculation control status. When speculation control is enabled, the execution mode changes to in-program-order to prevent memory conflicts, while maintaining out-of-program-order execution when speculation control is disabled, thus adapting to different operational conditions

Inventive Principle:

Principle #15Dynamics

2Reliability

If speculation control is enabled to ensure correct execution, then reliability improves, but memory performance deteriorates due to throttling

Engineering Contradiction:

Improveexecution correctnessVSAvoidmemory performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The processor performs preliminary actions by dynamically detecting speculation control status and adjusting execution mode before memory conflicts occur. When speculation control is detected as enabled, the system proactively switches to in-program-order execution and activates dynamic prefetching to prevent throttling, rather than reacting after performance degradation occurs

Inventive Principle:

Principle #10Preliminary action

3Productivity

If dynamic prefetching is implemented to improve memory performance, then productivity increases, but device complexity increases

Engineering Contradiction:

Improvememory performanceVSAvoidprocessor complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The dynamic prefetching mechanism operates autonomously based on detected speculation control status without requiring external control signals or complex coordination. The processor self-adjusts its prefetching behavior according to the operational mode, reducing the need for additional control logic and simplifying the overall system architecture

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS10127155B2Memory performance when speculation control is enabled, and instruction therefor

Publication Date: 2018.11.13 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

Throttling execution in a transaction operating in a processor configured to execute memory instructions out-of-program-order in a pipelined processor, wherein memory instructions are instructions for accessing operands in memory. Included is executing instructions of a transaction. Also included is determining whether the transaction is in throttling mode and based on determining that a transaction is in throttling mode, executing memory instructions in-program-order and dynamically prefetching memory operands of memory instructions.