Processor Transaction Time Stamp Acquisition Control

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Solution Overview

Problem

In processors that use transactional memory for efficient execution of critical sections, the acquisition of time stamps can lead to violations of single lock atomicity (SLA) when critical sections are executed concurrently, resulting in inefficient operations due to frequent transaction abortions.

Innovation Solution

A processor is configured to monitor and prevent the acquisition of time stamps during transactions that meet predetermined conditions, ensuring strong temporal isolation and maintaining the appearance of mutual exclusion among critical sections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If transactions are used to execute critical sections concurrently, then execution efficiency is improved, but time stamp acquisitions may reveal violations of single lock atomicity

Engineering Contradiction:
Improveexecution efficiencyVSAvoidsingle lock atomicity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary actions by acquiring time stamps before executing critical section instructions. By capturing the time stamp at the beginning of the transaction and using it to control subsequent time stamp acquisitions, the system ensures that no overlapping time stamps are generated that would reveal concurrent execution, thus maintaining SLA appearance while allowing concurrent transactions

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system introduces an intermediary mechanism - a flag variable that tracks whether a time stamp has been acquired during the transaction. This flag acts as a mediator between the time stamp acquisition instruction and the critical section execution, controlling future time stamp requests to prevent SLA violations while maintaining transactional concurrency

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If time stamp acquisitions are prevented during transactions, then single lock atomicity violations are avoided, but transaction efficiency decreases due to frequent abortions

Engineering Contradiction:
Improvesingle lock atomicityVSAvoidtransaction efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By acquiring the time stamp at the beginning of the transaction (preliminary action) and using it to control subsequent acquisitions, the system allows transactions to proceed efficiently without unnecessary abortions. The preliminary time stamp acquisition establishes a baseline that prevents future conflicting acquisitions, maintaining both efficiency and SLA integrity

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If multiple time stamps are acquired during a transaction, then more precise timing information is obtained, but the risk of SLA violation increases

Engineering Contradiction:
Improvetiming information precisionVSAvoidsingle lock atomicity
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The system applies partial action by allowing only one time stamp acquisition per transaction (the first one) rather than preventing all time stamp acquisitions entirely. This partial approach provides sufficient timing information for the critical section while avoiding the excessive action that would cause SLA violations through multiple overlapping time stamps

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9286111B2Accessing time stamps during transactions in a processor
Publication Date: 2016.03.15 ADVANCED MICRO DEVICES INC
  • US9286111B2 patent drawing
  • US9286111B2 patent drawing
  • US9286111B2 patent drawing

AI summary

The described embodiments include a processor that handles operations during transactions. In these embodiments, the processor comprises one or more cores. During operation, at least one core is configured to monitor the acquisition of time stamps during transactions. The at least one core is further configured to prevent the acquisition of time stamps that meet predetermined conditions.