Processor Timestamp Bits for High-Entropy Random Numbers
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Solution Overview
Problem
Existing random number generation methods for high-security encryption are complex, require hardware circuitry, are poorly suited for generating large random numbers quickly, and are prone to biases and predictability, especially in processor states.
Innovation Solution
Utilizing the timestamp register of a processor's sequencing clock, which counts pulses deterministically, to generate random numbers by reading its least significant bits at unpredictable moments, ensuring high entropy without calibration or additional hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If physical phenomena or user interaction methods are used to generate random numbers, then high entropy is achieved, but device complexity increases due to required hardware circuitry
Solution Approach 1:
The patent replaces physical/mechanical random number generation systems (thermal noise, electromagnetic noise, user interaction hardware) with a software-based method that uses processor timestamp registers. This substitution eliminates the need for dedicated hardware circuitry while maintaining high entropy through the unpredictable timing of processor operations.
Solution Approach 2:
The patent makes the processor itself serve as the random number generation source by utilizing its own timestamp register and internal timing mechanisms. The processor's natural operational variations and timing jitter provide the entropy source, eliminating the need for external hardware components.
2Reliability
If physical phenomenon-based generators are used, then high entropy random numbers are produced, but response time increases when generating large random numbers
Solution Approach 1:
The patent segments the random number generation process into efficient software operations that can be executed rapidly. By dividing the timestamp register into multiple entropy sources and using bitwise operations to extract random bits, the system can generate large random numbers quickly without the time penalties of physical measurement systems.
Solution Approach 2:
The timestamp register continuously updates with each processor cycle, providing a continuous stream of entropy. This allows the random number generator to maintain high throughput and respond quickly to requests, as the entropy source is always available and updating without interruption.
3Reliability
If hardware-based random number generators are implemented, then high entropy is achieved, but implementation simplicity is reduced
Solution Approach 1:
The patent makes the processor's timestamp register serve multiple functions: it acts as both a timing mechanism for processor operations and as a random number generation source. This multi-functionality simplifies implementation by eliminating dedicated hardware components, as the existing processor infrastructure is repurposed for dual use.
Solution Approach 2:
Instead of creating new hardware circuitry, the patent copies the functionality of random number generation into the software layer by reading and processing the timestamp register values. This software-based approach is easier to manufacture and deploy than hardware implementations.
Data Source
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AI summary
This process is implemented within a digital processor (10) by: a) querying an internal timestamp register (30) counting pulses from a clock (24) for sequencing the processor; b) extracting at a given time n bits of the least significant bits of the register, n ≥ 1; c) using the n bits extracted in step b) as bit(s) constituting an N-bit random number (34) to be generated; d) repeating steps a) to c) until the N bits of the random number are obtained; and e) delivering the random number to an application circuit or software.