Processor Timing Obfuscation for Side Channel Attack Mitigation
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Solution Overview
Problem
Side channel attacks, particularly micro-architectural leaks, compromise the confidentiality of processor-based devices by exploiting unintentional leaks such as cache utilization, posing a threat to cryptographic applications and cloud installations.
Innovation Solution
A method that involves identifying processes attempting to obtain timing information from processor-based devices and delaying the delivery of this information by a time-delay period, calculated as a sum of a remainder of clock cycles in a current epoch interval and a random-based portion of the following epoch interval, to obfuscate timing information and prevent attackers from extracting sensitive information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If timing information is provided accurately and immediately, then process efficiency and productivity are improved, but security against side channel attacks deteriorates
Solution Approach 1:
The system preemptively identifies processes requesting timing information and applies delays before the information can be used for side channel attacks. By detecting the timing information request in advance and inserting a time-delay period, the system neutralizes the security threat before the attacker can extract sensitive information through fine-grained timing measurements.
Solution Approach 2:
The system introduces an intermediary mechanism (time-delay period) between the timing information source and the requesting process. This intermediary layer obfuscates the actual timing information by adding unpredictable delays, preventing direct correlation between observed timing and underlying micro-architectural events while still allowing the process to receive timing data.
2Object-affected harmful factors
If timing information delivery is delayed to prevent attacks, then security is improved, but process efficiency and productivity deteriorate
Solution Approach 1:
The system applies timing delays selectively rather than universally. By identifying specific processes that request timing information and applying delays only to those cases, the system provides partial protection against side channel attacks while minimizing the impact on overall process efficiency. Normal operations that do not involve timing information requests continue without interruption.
3Measurement precision
If fine-grained timing measurements are enabled, then measurement precision is improved, but security against micro-architectural leaks deteriorates
Solution Approach 1:
The system applies a protective cushion (time-delay period) beforehand to prevent timing information from revealing micro-architectural events. By inserting delays before timing information is delivered to processes, the system cushions against the vulnerability of micro-architectural leaks, ensuring that even precise timing measurements cannot accurately reflect underlying cache or branch predictor states.
Data Source
AI summary
Disclosed are devices, systems, apparatus, methods, products, and other implementations, including a method that includes identifying a process to obtain timing information of a processor-based device, and in response to identifying the process to obtain the timing information, delaying delivery of the timing information for a time-delay period. In some embodiments, identifying the process to obtain the timing information may include identifying a request to obtain the timing information of the processor-based device. In some embodiments, identifying the process to obtain the timing information may include identifying a memory-access process.