Processor Tracer Memory Compression and Cyclic Storage
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Solution Overview
Problem
Existing technologies for storing trace information in processor memory are inefficient due to the variable length trace storage format, which results in wasted memory space and incomplete data storage, as pieces of variable length data cannot be stored without leaving vacant areas, leading to 1/16 of the memory capacity being unused.
Innovation Solution
A tracer system that includes a trace memory, a trace information compression unit to compress data into a predetermined format, and an address register to store the last stored address, allowing cyclic storage and retrieval of compressed trace information without needing to store start addresses, thereby maximizing memory usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If variable length trace storage format is used to store trace information, then more trace information can be stored in memory, but memory space is wasted due to vacant areas between pieces of variable length data
Solution Approach 1:
The trace information is segmented into fixed-length blocks of 64 bits (words), with each block storing multiple trace items. This segmentation eliminates the need for variable length storage and prevents vacant areas between data pieces, as each block is completely filled with trace information before moving to the next block.
Solution Approach 2:
The storage format changes from variable length to fixed length (64-bit words). By changing the parameter of trace item length from variable to fixed, the system achieves contiguous storage without vacant areas, maximizing memory utilization while still accommodating different amounts of trace information through multiple fixed-length blocks.
2Ease of operation
If 4-bit start address information is stored in the lower bits of each word, then trace information can be located, but 1/16 of the trace memory capacity cannot be used for storing trace information
Solution Approach 1:
The start address information is extracted from the storage location and replaced by a counter mechanism. Instead of storing 4-bit address information in the lower bits of each word, the system uses a counter to track the current position and generate addresses dynamically, eliminating the need for embedded address markers and freeing up memory capacity.
Solution Approach 2:
A counter serves as an intermediary mechanism between the trace storage and retrieval operations. The counter maintains the current position in the trace stream and enables the system to calculate start addresses on demand, replacing the need for stored address information while maintaining efficient trace location capabilities.
3Quantity of substance
If trace information is stored cyclically piece by piece, then memory utilization is maximized, but the complexity of managing and retrieving trace information increases
Solution Approach 1:
The trace information is stored continuously in fixed-length blocks without interruption or gap, maximizing memory utilization. The cyclic storage pattern ensures that trace data fills memory sequentially from the beginning, wrapping around to the end and continuing from the start, eliminating vacant areas while maintaining simple linear access patterns.
Solution Approach 2:
The system uses a counter that automatically increments with each stored trace item, eliminating the need for external address management. The counter self-manages the positioning and address generation, simplifying the retrieval process while enabling continuous cyclic storage that maximizes memory utilization without complex management overhead.
Data Source
AI summary
A tracer includes a trace memory that is stored with trace information of the program execution status of a processor; trace information compression unit that compresses the trace information into a predetermined trace format, and stores the resulting compressed information in the trace memory piece by piece cyclically; and an address register that stores the last stored address of the trace memory, analyzes the content of the trace memory in reverse order to a program executed order, searches for a start or end of the trace format, and carries out trace analysis therefrom in the program executed order.


