Product Code Decoder With Syndrome Queues for Low-Area ECC

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Solution Overview

Problem

Existing error correction codes (ECC) in memory devices are complex and power-intensive, leading to increased costs and space requirements, making them unsuitable for devices with limited area and power budgets, while non-ECC implementations compromise data integrity and reliability.

Innovation Solution

The use of a product code decoder with a row and column syndrome queue for error correction, which subdivides large product-codes into smaller component codes, enabling efficient iterative decoding and reducing hardware complexity and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If highly effective ECC processes (LDPC, BCH, Reed-Solomon) are used, then error correction capability is improved, but hardware complexity and power consumption increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoidhardware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the error correction task into multiple iterations of row and column decoding operations on a product code structure. Each iteration processes only the necessary rows and columns, segmenting the overall decoding workload into manageable chunks that can be handled by simpler hardware components.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs iterative decoding where the same row and column decoders are reused across multiple decoding iterations. This periodic reuse of decoding components eliminates the need for dedicated hardware for each decoding operation, significantly reducing overall hardware complexity while maintaining effective error correction.

Inventive Principle:
Principle #19Periodic action

2Reliability

If highly effective ECC processes (LDPC, BCH, Reed-Solomon) are used, then error correction capability is improved, but power consumption increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent segments the error correction process into iterative row and column decoding steps, allowing the system to process only the necessary portions of data in each iteration. This segmentation enables early termination when errors are corrected, reducing overall power consumption compared to processing the entire code block uniformly.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

By reusing the same decoding hardware periodically across multiple iterations, the patent avoids the power penalty of having multiple dedicated decoders running simultaneously. The periodic activation of decoding components significantly reduces average power consumption while maintaining effective error correction capability.

Inventive Principle:
Principle #19Periodic action

3Reliability

If traditional ECC designs are used, then error correction is provided, but controller footprint and design cost increase

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidcontroller footprint
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent segments the controller architecture into modular row and column decoding units that can be independently configured and reused. This segmentation allows the same hardware blocks to serve multiple decoding functions across different iterations, reducing the overall controller footprint compared to traditional designs that require dedicated hardware for each error correction function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The row and column decoders designed in the patent are universal components that can handle multiple decoding tasks across different iterations and code structures. This multi-functionality eliminates the need for specialized hardware for each error correction scenario, significantly reducing controller footprint and design cost while maintaining robust data recovery capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20190312600A1Area efficient implementation of a product code error correcting code decoder
Publication Date: 2019.10.10 MICRON TECHNOLOGY INC
  • US20190312600A1 patent drawing
  • US20190312600A1 patent drawing
  • US20190312600A1 patent drawing

AI summary

A method and system for implementing error correcting code using a product code decoder. The method and system receive a product code, wherein the product code is a matrix of row and column component codes, generate a plurality of row syndromes column syndromes from the received product code, store the plurality of row syndromes in a row syndrome queue, store the plurality of column syndromes in a column syndrome queue, the column and row syndrome queue to support the plurality of modes of operation corresponding to the plurality of phases of decoding the product code, correct the plurality of row syndromes and columns syndromes in the row and column syndrome queues based on errors detected in respective row and column syndromes and errors detecting in overlapping syndromes, and correct the product code in a codeword buffer at locations corresponding to corrections in the plurality of row syndromes and the plurality of column syndromes.