Profiling Circuit Arrangement for Cycle-to-Cycle SOC Analysis
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Solution Overview
Problem
Current profiling tools for system-on-chip (SOC) devices face challenges in analyzing the cycle-to-cycle behavior of complex systems, as they generate overwhelming data and cannot record events outside the processor, influencing the system behavior during analysis.
Innovation Solution
A circuit arrangement in programmable logic resources and RAM is implemented to receive event indication signals, write event data to RAM, and output data on a bus, allowing for independent profiling with minimal impact on the system performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If profiling tools execute on the same processor as the software being profiled, then the tools can access system data, but the execution of profiling tools influences the behavior of the system being analyzed
Solution Approach 1:
The profiling functionality is extracted from the processor and implemented as a separate hardware circuit arrangement in programmable logic. This circuit arrangement includes event detection logic, a counter, and a RAM interface that operates independently of the processor, allowing profiling without influencing system behavior.
Solution Approach 2:
A dedicated hardware circuit arrangement acts as an intermediary between the processor and the profiling analysis. This circuit detects events, counts cycles, and stores data in RAM without requiring processor execution, serving as a mediator that collects data without affecting the processed system.
2Measurement precision
If dataflow analysis tools are used to analyze cycle-to-cycle behavior, then comprehensive system performance can be measured, but the tools become overloaded with data
Solution Approach 1:
The circuit arrangement extracts only the necessary profiling data (event occurrence and cycle count) from the complex system behavior. By filtering and selecting only relevant events to be recorded in RAM, it reduces data volume while maintaining measurement precision for cycle-to-cycle analysis.
Solution Approach 2:
The profiling function is segmented into discrete hardware components: event detection logic for identifying specific events, a cycle counter for timing measurement, and a RAM interface for data storage. This segmentation allows each component to handle specific tasks independently, reducing overall processing complexity.
3Loss of information
If profiling tools record all events outside the processor, then complete system behavior can be analyzed, but the amount of data generated becomes overwhelming
Solution Approach 1:
The circuit arrangement implements partial profiling by recording only specific events of interest rather than all possible events. The event detection logic selectively monitors and records only relevant events, reducing data volume while maintaining completeness for the intended analysis purposes.
Solution Approach 2:
The circuit arrangement performs preliminary filtering of events before storage. By pre-determining which events are relevant and selecting them for recording in RAM, it reduces the quantity of data that needs to be stored and processed while maintaining the completeness of important event information.
Data Source
AI summary
Various approaches for tracing events in an electronic system are disclosed. In one approach, a circuit arrangement includes a bus, a random access memory (RAM), a plurality of programmable logic resources, and coupled configuration memory cells. A circuit arrangement is implemented in the programmable logic. The circuit arrangement receives a plurality of event indication signals from an application circuit and writes event data to the RAM in response to a change in the state of any one of the event indication signals. A bus interface circuit is coupled to the bus and to the read port of the RAM. Responsive to a read transaction on the bus for the RAM, the bus interface circuit reads data from the RAM and outputs the data on the bus in a reply bus transaction.