Program Execution Device Error Handling via Segmented Memory

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Solution Overview

Problem

In multi-CPU configurations, a substitute CPU taking over a process from a failing CPU must execute additional processes within a predetermined period, requiring additional resources and time, which can be challenging if the substitute CPU is already loaded.

Innovation Solution

A program execution device that includes a memory to store information specifying programs to be executed by both itself and another device, with an instruction processing unit that detects errors and switches between normal and error-execution protocols, allowing it to take over programs from a failing device even if resources are limited.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a substitute CPU takes over the process of a failing CPU, then system reliability is improved, but the load on the substitute CPU increases beyond its capacity

Engineering Contradiction:
Improvesystem reliabilityVSAvoidprocess execution capacity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the program set into two groups: first programs (normal execution) and second programs (error-handling execution). This segmentation allows the instruction processing unit to selectively execute only necessary programs when an error occurs, rather than attempting to execute all programs simultaneously, thus managing the substitute CPU's load while maintaining reliability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of requiring the substitute CPU to execute all programs of the failing CPU plus its own programs (excessive action), the patent implements partial action by executing only second programs that are specifically designated for error-handling scenarios. This partial execution approach ensures the substitute CPU can handle the takeover without being overwhelmed by excessive load

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If the substitute CPU executes additional processes, then process continuity is maintained, but the time required for execution increases beyond the predetermined period

Engineering Contradiction:
Improveprocess continuityVSAvoidexecution period
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-designating second programs in the memory before errors occur. These programs are specifically prepared for error-handling scenarios, allowing the instruction processing unit to immediately switch to executing the appropriate subset of programs when an error is detected, rather than determining which programs to execute in real-time, thus reducing execution time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements periodic action by structuring program execution in distinct phases: normal execution of first programs during error-free operation, and error-handling execution of second programs when errors occur. This periodic switching between execution modes allows the system to maintain process continuity while managing time constraints by confining error-handling execution to specific periods when errors are detected

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10579489B2Program execution device, program execution system, and program execution method
Publication Date: 2020.03.03 MITSUBISHI ELECTRIC MOBILITY CORP
  • US10579489B2 patent drawing
  • US10579489B2 patent drawing
  • US10579489B2 patent drawing

AI summary

In a program execution device (100X), a memory (110) stores first information (101X) specifying one or more programs, and second information (102X) specifying some programs including at least one of programs to be executed by an other program execution device (100Y), out of the programs specified by the first information (101X) and the programs to be executed by the other program execution device (100Y). When an error in the other program execution device (100Y) is not detected by an error processing unit (123), an instruction processing unit (120) executes the programs specified by the first information (101X). When the error in the other program execution device (100Y) is detected by the error processing unit (123), the instruction processing unit (120) executes the programs specified by the second information (102X).