Program Rewriting Apparatus for Ambiguous Memory Dependence
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Solution Overview
Problem
The increasing speed gap between processors and main memory leads to memory access becoming a bottleneck, particularly due to ambiguous memory dependence, which prevents prioritizing load commands over store commands in static command scheduling without special hardware.
Innovation Solution
A program re-writing apparatus that inserts comparison processes and logic preservation processes into the inputted program to determine and manage ambiguous memory dependence, allowing for efficient scheduling of memory access commands without requiring special hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If static command scheduling is used, then command scheduling can be performed without special hardware, but memory access commands with ambiguous memory dependence cannot be prioritized and the penalty cycle cannot be hidden
Solution Approach 1:
The patent transforms static command scheduling into dynamic scheduling by introducing a determination unit that analyzes memory access commands and their address values at runtime. This allows the system to adaptively prioritize load commands over store commands based on actual memory address overlaps, resolving the contradiction between implementation simplicity and processing speed optimization.
Solution Approach 2:
The determination unit performs preliminary analysis of memory access commands to identify ambiguous memory dependence before execution. By determining in advance which load commands should be prioritized based on their address values, the system can prepare command schedules that optimize performance without requiring complex hardware support.
2Productivity
If load commands are prioritized over store commands, then the penalty cycle can be hidden and processing speed improves, but special hardware is required to execute speculative load commands
Solution Approach 1:
Instead of using special hardware to execute speculative load commands, the patent creates a software-based solution by copying the determination and scheduling logic into the command schedule itself. The determination unit analyzes memory access patterns and generates optimized schedules that emulate speculative execution behavior without requiring special hardware instructions or components.
Solution Approach 2:
The patent replaces the mechanical hardware-based speculative execution mechanism with a software-based command scheduling approach. By using the determination unit to analyze memory address values and dynamically adjust command schedules, the system achieves speculative execution benefits through software intelligence rather than hardware circuitry.
3Device complexity
If ambiguous memory dependence is not relaxed, then command scheduling remains simple, but the memory access bottleneck cannot be overcome due to the speed gap between processor and main memory
Solution Approach 1:
The determination unit continuously monitors memory access commands and their address values, providing feedback to the scheduling process. This feedback mechanism allows the system to identify when load commands should be prioritized based on actual memory access patterns, enabling dynamic adjustment of command schedules to overcome memory bottlenecks without excessive complexity.
Data Source
AI summary
A program re-writing method which re-writes an inputted program into a program for a processor for controlling whether or not a process is executed based on a yes or no execution flag, said program re-writing method including: inserting a comparison process into the inputted program, the comparison process comparing first address information, which is memory address information accessed by a first memory access process included in the inputted program, and second address information, which is address information of a memory accessed by a second memory access process included in the inputted program, and writing a comparison result into the yes or no execution flag; and inserting a yes or no execution flag-attached logic preservation process into the inputted program, the yes or no execution flag-attached logic preservation process being a process executed based on a value of the yes or no execution flag and preserving the same result as a result of the inputted program when executed.