Program Verify Pass-Through Voltage for Memory Retention Loss
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Solution Overview
Problem
Existing corrective program verify operations in memory devices suffer from read window budget (RWB) degradation due to cell-to-cell interference and lateral charge migration, leading to increased errors and data retention loss, without effectively addressing these issues without additional programming time or circuitry area consumption.
Innovation Solution
Implementing a corrective program verify operation with a program verify pass through voltage (Vpass(pv)) that is lower than the read operation pass through voltage (Vpass(read)) by an offset amount (PV offset) for adjacent wordlines, adjusted based on the target programming level and loss levels of the wordline group, to mitigate RWB degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a standard program verify operation is performed with pass through voltage applied to adjacent wordlines, then the verify operation can be completed, but read window budget degradation occurs due to cell-to-cell interference and lateral charge migration
Solution Approach 1:
The patent changes the voltage parameter applied to adjacent wordlines during program verify operations. Specifically, it applies a reduced pass through voltage (Vpass(pv)) to adjacent wordlines compared to the voltage applied during read operations (Vpass(read)). This parameter change reduces the electric field strength that causes lateral charge migration and cell-to-cell interference, thereby reducing read window budget degradation while still maintaining sufficient current flow for verify operations.
2Reliability
If corrective measures are applied to mitigate cell-to-cell interference, then data retention improves, but programming time increases
Solution Approach 1:
The patent applies corrective voltage adjustments during the program verify operation itself, rather than requiring separate corrective operations afterward. By modifying the pass through voltage applied to adjacent wordlines during the verify step, the patent proactively compensates for cell-to-cell interference effects before they cause data retention problems, eliminating the need for additional programming time.
3Measurement precision
If higher pass through voltage is applied to adjacent wordlines during program verify, then verify accuracy improves, but lateral charge migration increases causing read window budget loss
Solution Approach 1:
The patent optimizes the pass through voltage parameter to achieve a balance between verify accuracy and minimizing lateral charge migration. By applying a reduced voltage (Vpass(pv) = Vpass(read) - PV offset), the patent maintains sufficient current flow for accurate verify operations while reducing the electric field strength that drives lateral charge migration and read window budget degradation.
Data Source
AI summary
A program operation is initiated to program a set of target memory cells of a target wordline of a memory device to a target programming level. An offset value that is based on a loss level associated with the target wordline is selected. During a program verify operation, a program verify voltage level is caused to be applied to the target wordline to verify programming of the set of target memory cells. During the program verify operation, a pass through voltage level is caused to be applied to at least one of a first wordline adjacent to the target wordline or a second wordline adjacent to the target wordline, where the pass through voltage level is a pass through read voltage level reduced by the offset value.