Programmable Analog Calibration Circuit for Precise SerDes Lane Measurement
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional on-chip analog calibration (ACAL) circuits for high-speed SerDes systems face challenges such as large die area consumption, increased routing complexity, and power consumption due to the need for a limited number of central ACAL circuits to support multiple lanes, leading to performance degradation and calibration delays.
Innovation Solution
The implementation of programmable ACAL circuits with a voltage reference generation circuit and a comparator, along with optional filter, multiplexor, and delta-sigma modulator components, allows for iterative and precise measurement of input circuit voltages by generating programmable step reference voltages, reducing noise, and enabling more accurate calibration with a smaller footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a smaller number of central ACAL circuits are used to support multiple lanes, then the die area consumption is reduced, but the routing complexity and signal routing delay increase
Solution Approach 1:
The patent divides the ACAL circuit functionality into multiple distributed instances, with each ACAL circuit macro responsible for calibrating specific lanes. This segmentation eliminates the need for complex centralized routing while maintaining calibration effectiveness across multiple SerDes lanes.
2Area of stationary object
If a smaller number of central ACAL circuits are used to support multiple lanes, then the die area consumption is reduced, but the signal routing delay increases
Solution Approach 1:
The patent places ACAL circuit macros locally near the SerDes lanes they serve, creating a one-to-one or one-to-few mapping. This local placement minimizes signal routing delay while reducing overall die area consumption compared to a centralized approach.
3Adaptability or versatility
If the ACAL circuit is designed to generate multiple on-chip measurement signals to support a plurality of on-chip circuits, then the calibration capability is improved, but the size and power consumption of the ACAL circuit increase
Solution Approach 1:
The patent designs the ACAL circuit macro to be universally applicable across multiple lanes through programmable control. Each macro can be configured via control signals to generate measurement signals for different lanes, providing multi-functionality without requiring separate dedicated circuits for each lane.
4Adaptability or versatility
If the ACAL circuit is designed to generate multiple on-chip measurement signals to support a plurality of on-chip circuits, then the calibration capability is improved, but the power consumption of the ACAL circuit increases
Solution Approach 1:
The patent implements dynamic configuration of the ACAL circuit macro through control signals that enable the same hardware to serve different lanes at different times. This dynamic multiplexing reduces power consumption compared to having multiple static ACAL circuits, as only the actively used macro instances consume significant power.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables more precise and efficient on-chip calibration by reducing the size and power consumption of ACAL circuits, allowing for a larger number of smaller ACAL circuits to be placed closer to the circuits they calibrate, thereby reducing routing delays and improving overall system performance.
Implementation Method 1
the programmable voltage reference generation circuit 106 is configured to provide an input reference voltage VREF based on a programmed step reference voltage(s)
Implementation Method 2
The comparator circuit 108 is configured to compare the input reference voltage VREF to an input circuit voltage VIN from a measured circuit 102
Data Source
AI summary
Analog calibration (ACAL) circuits supporting iterative measurement of an input signal from a measured circuit, and related methods are disclosed. The ACAL circuit includes a voltage reference generation circuit and a comparator circuit. The voltage reference generation circuit is configured to provide an input reference voltage. The comparator circuit is configured to compare the input reference voltage to an input circuit voltage of a measured circuit and generate a digital measurement signal based on the comparison. To provide for the ACAL circuit to more precisely measure the input circuit voltage, the voltage reference generation circuit is programmable and is configured to a generate the input reference voltage based on a programmed reference voltage selection. In this manner, the ACAL circuit can be used to measure the input circuit voltage in an iterative manner based on different programmed input reference voltages for a more precise measurement of the input circuit voltage.


