Programmable Analog Tile Configuration for Power Management
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Solution Overview
Problem
Existing power management integrated circuits (PMICs) require significant engineering effort and time to customize for specific customer requirements due to their irregular shapes and shared circuitry, leading to increased costs and longer time-to-market, as well as inclusion of unused circuitry.
Innovation Solution
A Multi-Tile Power Management Integrated Circuit (MTPMIC) composed of regularly shaped, programmable PMIC tiles with a standardized bus for simplified placement and configuration, using an 'Analog Tile Selection, Placement, Configuration and Programming' (ATSPCP) tool to select, place, and program tiles based on user input, eliminating the need for custom routing layers and memory structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional custom PMU design with irregular-shaped analog circuits is used, then functional capability can be tailored to customer requirements, but engineering effort and time-to-market increase significantly
Solution Approach 1:
The PMU is divided into discrete, regularly-shaped functional blocks or tiles that can be independently selected and combined. Each tile contains specific analog circuits with standardized interfaces, allowing modular assembly to meet different customer requirements without redesigning the entire circuit layout.
Solution Approach 2:
The standardized tile architecture enables a single PMU design platform to serve multiple customer requirements by configuring different combinations of universal functional blocks. The same tile library can be arranged to fulfill various power management needs, reducing the need for custom designs for each application.
2Adaptability or versatility
If traditional custom PMU design with irregular-shaped analog circuits is used, then functional capability can be tailored to customer requirements, but engineering costs increase
Solution Approach 1:
The PMU is divided into discrete, regularly-shaped functional blocks or tiles that can be independently selected and combined. Each tile contains specific analog circuits with standardized interfaces, allowing modular assembly to meet different customer requirements without redesigning the entire circuit layout.
Solution Approach 2:
The standardized tile architecture enables a single PMU design platform to serve multiple customer requirements by configuring different combinations of universal functional blocks. The same tile library can be arranged to fulfill various power management needs, reducing the need for custom designs for each application.
3Adaptability or versatility
If PMU is designed with large range of functionality to meet particular customer requirements, then customization is achieved, but device size and cost increase due to unused circuitry
Solution Approach 1:
The PMU is divided into discrete, regularly-shaped functional blocks or tiles that can be independently selected and combined. Each tile contains specific analog circuits with standardized interfaces, allowing modular assembly to meet different customer requirements without redesigning the entire circuit layout.
Solution Approach 2:
Only the specific functional tiles required by the customer are included in the final PMU design. Unused functional blocks are extracted or omitted from the configuration, allowing the device to be customized without including unnecessary circuitry that would increase size and cost.
Data Source
AI summary
A programmable analog tile integrated circuit configuration tool communicates a power management control characteristic query soliciting control requirement information for a novel Power Management Integrated Circuit (PMIC) tile in a Multi-Tile Power Management Integrated Circuit (MTPMIC). The configuration tool receives a user response to the query indicating control requirements across a network. The PMIC tile includes configuration registers. Configuration information bit values stored in the configuration registers control the operational characteristics of the functional circuitry of the tile. The configuration registers of each novel PMIC tile are accessible at pre-defined addresses on a standardized bus of the MTPMIC. In response to the user response, the configuration tool generates appropriate tile configuration information for loading the configuration registers such that the PMIC tile within the MTPMIC is programmed to satisfy the user's control requirements.


